HP 16554A Programmer's Manual page 184

State/timing logic analyzers
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TTRigger (TTRace) Subsystem
BRANch
Within the limitations shown by the syntax definitions, complex expressions
may be formed using the AND and OR operators. Expressions are limited to
what you could manually enter through the Timing Trigger menu. Regarding
parentheses, the syntax definitions on the next page show only the required
ones. Additional parentheses are allowed as long as the meaning of the
expression is not changed. Figure 12-2, on page 12-11, shows a complex
expression as seen in the Timing Trigger menu.
Example
The following statements are all correct and have the same meaning. Notice
that the conventional rules for precedence are not followed. The expressions
are evaluated from left to right.
OUTPUT XXX;":MACHINE1:TTRIGGER:BRANCH1 'C AND D OR F OR G', 1"
OUTPUT XXX;":MACHINE1:TTRIGGER:BRANCH1 '((C AND D)
G))', 1"
OUTPUT XXX;":MACHINE1:TTRIGGER:BRANCH1 'F OR (C AND D) OR
G',1"
integer from 1 to <number_of_levels>
<N>
integer from 1 to <number_of_levels>
<to_level_
number>
integer from 1 to the number of existing sequence levels (maximum 10)
<number_of_
levels>
<qualifier> see "Qualifier" on page 12-6
<branch_
qualifier>
Example
OUTPUT XXX;":MACHINE1:TTRIGGER:BRANCH1 'ANYSTATE', 3"
OUTPUT XXX;":MACHINE2:TTRIGGER:BRANCH2 'A', 7"
OUTPUT XXX;":MACHINE1:TTRIGGER:BRANCH3 '((A OR B) OR NOTG)',
1"
12–10
OR (F OR

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