Intel MCS 51 User Manual page 273

i~.
83C152 HARDWARE DESCRIPTION
Data Memory Map (bite):
. . .
Byte
BITADDRESSES
Address (MSB)
(LSB)
020H 07
08 05 04 03
02
01 00
021H OF OE OD Oc OB OA 09 08
022H 17 16 15 14 13 12
11
10
023H
024H
025H
026H
027H
028H
029H
02AH
02BH
02CH
02DH
02EH
02FH
I 27 I 26 I 25
I 24 I 23 1 22 I 21 I 2(I I
3F 3E 3D 3C 3B 3A 39 38
47
46 45
44
43
42 41 40
4F 4E 4D 4C
46
4A 49
48
57
56 55 54 53
52 51
50
5F 5E 5D 5C
5B
5A 59
58
67 66 65 64 63 62 61 60
6F 6E 6D 6C 6B 6A 69 68
77 76 75 74 73 72 71 70
7F 7E 7D 7C 7B 7A 79 78
Figure 2.3A. Bit Addresses
Byte BIT ADDRESSES
Address (MSB)
O-SB)
080H
088H
098H
OAOH
OA8H
OBOH
OB8H
OCOH
OC6H
ODOH
OD8H
OEOH
OE8H
OFOH
OF8H
8F 6E 8D 8C 8B 8A 89 88
97 96 95 94 93 92
91 90
9F 9E
9D
8C
I
96 9A 99 98
A7 A6 A5 A4 A3 A2 Al AO
B? B6
B5
B4 B3 B2 B1 BO
BC BB BA B9 B8
C7 C6 C5 C4 C3
C2
cl co
CD
cc CB CA C9 C6
D7 D6 D5 D4 D3 D2
D1 DO
DF
DE
DD Dc DB
DA
D9 D8
E7
E6
E5 E4 E3
E2
El EO
EF
EE ED
EC EB
EA E9 E8
(Po)
(TCON)
(Pi)
(SCON)
(P2)
(IE)
(P3)
(1P)
(P4)
(IEN1)
(Psw)
(TSTAT)
(A)
(RSTAT)
(B)
FD FC I FB
FA
F9
F8
1
(IPN1)
Figure 2.36. Bit Addresses
7-9