Intel MCS 51 User Manual page 151

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8XC52/54/58
HARDWARE DESCRIPTION
operating m odes:
Captur%auto-reload (up or down
counting), and baud rate generator.The modes are ae-
lected by bits in T2CON as shown in Table 4.
Timer 2 consists of two 8-bit registers, TH2 and TL2.
In the Timer function, the TL2 register is incremented
every machine cycle. Thus one can think of it as count-
ing machine cycles Siuce a machine cycle consists of 12
oscillator perioda,the count rate is 1/12of the oscillator
frequency.
ternafinput pin, T2. In this function, the external input
is sampled during S5P2 of every machine cycle. When
the samples show a high in one cycle and a low in the
next cycle, the count is irtcremented.The new count
value appears in the register during S3P1 of the cycle
following the one in which the transition was detected.
Since it takes 2 machine cycles (24 oscillator periods) to
~- a l-to-o transition, the maximum count m~
IS1/2,of the oscillator frequency. To ensure that a given
level is sampled at least once before it changes, it
should be heid for at least one fidl machine cycl;.
In the Counter function, the register is incremented in
response to a l-to-O transition at its corresponding ex-
Table 3. T2CON—Timer/Counter 2 Control Reaieter
T2CON Address = OC8H ResetValue= 0000OOOOB
BitAddressable
TF2 EXF2 RCLK TCLK EXEN2 TR2 cPfm cP/m
Bit
7 6 5 4
3 2 1 0
Symbol Function
TF2
Timer2 overflow flagsetbya Timer2 overflow andmustbe cleared bysoftware. TF2
willnotbe setwheneitherRCLK= 1 orTCLK= 1.
EXF2 Timer2 external f lag set wheneithera capture or reloadia caused by a negative
transition o nT2EXandEXEN2= 1. WhenTimer2 interrupt isenabled, EXF2= 1 will
causethe CPUto veetorto the Timer2 interrupt routine. E XF2mustbe clearedby
software. EXF2doesnotcause an interrupt inup/down counter
m ode (DCEN =
1).
RCLK
Receive clock enable. W hense~causes theserial p ortto useTimer
2 overflowpulses
foritsreceive clock
in serial portModes 1 and 3. RCLK = Ocauses Timer
1 overflow to
be usedforthereceive clock.
TCLK
Transmit clock enable. W henset,causes theserial p ortto useTimer
2 overflow
pulses
for
itstransmit clockin
serial port Modes 1 and 3. TCLK = (1~usgs Timgr 1 ovgrflows
to beused forthetransmit c lock.
EXEN2
Timer 2 external enable. W henset,allows a ~pture or reload to occur s sa result o f a
negative t ransition o nT2EXifTimer 2 isnotbeing used to clock theserial p ort.EXEN2
= Ocauses Timer2 to ignore events at T2EX.
TR2
Start/Stop control f orTimer2. TR2 = 1 starts thetimer.
cm!
Timer orcounter s elect forTimer2.C/~ = Ofortimerfunction. C/~ = 1 forexternal
eventcounter ( falling edgetriggered).
cPlm
Capture/Reload select. C P/~ = 1 causes captures t o occur onnegative t ransitions
at T2EXif EXEN2= 1. CP/~ = Ocauses automatic r eloads to occur w henTimer2
overflows o r negative t ransitions occur a t T2EXwhenEXEN2= 1. WheneitherRCLK
or TCLK= 1, thisbit is ignored andthe timer
is
forcedto auto-reload o n Timer2
overtlow.
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