Intel MCS 51 User Manual page 222

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87C51GB HARDWARE DESCRIPTION
Table4. TMOD: Timer/CounterModeControlRedeter
TMOD
Symbol
GATE
c/T
Ml MO
00
01
10
11
11
Address = 89H
Reset Value= 0000OOOOB
NotBitAddressable
TIMER1
I
TIMERO
I GATE I C/7 [ Ml I MO I GATEI C/~ I Ml I MO I
Bit 7 6 5 4 3 2 1 0
Funotion
Gating control whenset.Timer/Counter Oor1 isenabled only whileINTO or~ pin
ishigh andTRO orTRl control p inisset.When cleared, 1 7mer O or1 isenabled
whenever TROorTRl control b itisset.
Timer orCounter S elector. ClearforTimer operation ( input f rominternal system
clock). S etforCounter o peration ( input f rom TOorT1 input p in).
Operating Mode
8-bitTimer/Counter. THxwithTLxas5-bitpresceler.
16-bit T imer/Counter. THxandTLxarecascaded; thereisnoprescaler.
8-bitauto-reload Timer/Counter. THxholds a value which istobereloaded into TLx
eachtimeitoverflowa.
(Timer O )TLO isan8-bitTimer/Counter controlled b ythestandard T imer Ocontrol
bite. T HOisan8-bittimeronlycontrolled b yTimer1 control b its.
(Timer 1 )Timer/Counter stopped.
MODEO
Asthecount rolls over from all 1sto all 0s, it sets the
timer interrupt flag TFUor TF1. The countedinput is
EitherTimer Oor Timer 1in ModeOis an 8-bitcounter enabledto the timer whenTROor TRl = 1,and either
with a divid&by-32 preaesler. In this mb the Timer
GATEx = Oor INTx pin = 1. (8ettingGATEx = 1
regiSter is cotilgur~ as
a
13-bit register. Figure 8
allows the Timer to & controlled by-external input
showsthe Mode Ooperationfor either timer.
~ pin, to facilitate pulse width measurements).
I
Osc
1 <,1
1 ICO!TROLI"TL' !("=)HOWWX F
1
INTERRUPT
270897-10
Figure8. Timer/Counter Oor 1 inMode1% 13-BitCounter
6-14