Comtech EF Data SLM-5650A Installation And Operation Manual page 325

E.2 Functional Hardware Description
The NP Interface employs the very high-performance Intel IXP2350 network processor/32-bit
microcontroller with four embedded MicroEngines to perform the high-speed Layer 3 routing
functions.
A functional block diagram is provided in Figure E-2. The front-end of the NP Interface design
incorporates a Gigabit Ethernet (GbE) switch device that provides all Layer 2 management. The
back-end of the NP Interface design incorporates an FPGA to provide the WAN framing and
deframing, plus the interface into the main SLM-5650A modem design.
Appendix E
Figure E-2. NP Interface Block Diagram
E–3
SLM-5650A Satellite Modem
Revision 10
MN-SLM-5650A