ADLINK Technology cPCI-6810 User Manual page 77

Cpci-6810/6820 series 6u compactpci dual/single pentium tm iii sbc and rear i/o transition modules
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6. Select Bank 3 for Watch Dog Timer from SWC base
address.
Set Bit 1-0 of BANKSEL Register (I/O Base: 840H, Offset:
0FH) to 11, for example:
o 84F 03
7. Set the count down value for Watch Dog timer.
-> Set count down value to WDTO Register (I/O Base: 840H,
Offset: 11H)
00000000: Reserved
00000001: 1 minute
00000010: 2 minutes
:
:
11111111: 255 minutes
For example:
o 851 03?3 minutes
8. Enable trigger event to re-start new counter value
Set WDCFG Register (I/O Base: 840H, Offset: 12H) to 82H,
for example:
o 852 82
9. Enable Watch Dog Timer function
Set Bit 0 of WDCTL Register (I/O Base: 840H, Offset: 10H)
to 1, for example:
o 850 01
Appendix
67

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