ADLINK Technology cPCI-6930 User Manual
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ADLINK Technology cPCI-6930 User Manual

6u compactpci server class eight-core intel xeon e5 processor blade
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6U CompactPCI® Server Class Eight-Core
Intel® Xeon® E5 Processor Blade
Manual Rev.:
Revision Date:
Part No:
Advance Technologies; Automate the World.
cPCI-6930
User's Manual
2.02
November 13, 2014
50-15080-1020

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Summary of Contents for ADLINK Technology cPCI-6930

  • Page 1 6U CompactPCI® Server Class Eight-Core Intel® Xeon® E5 Processor Blade User’s Manual Manual Rev.: 2.02 Revision Date: November 13, 2014 Part No: 50-15080-1020 Advance Technologies; Automate the World.

  • Page 2: Revision History

    Revision History Revision Release Date Description of Change(s) 2.00 2013/04/15 Initial release 2.01 2014/01/21 Add IPMI user’s guide 2.02 2014/11/13 Add PMC slot -12V support note...

  • Page 3: Preface

    Preface Copyright 2013-14 ADLINK Technology Inc. This document contains proprietary information protected by copy- right. All rights are reserved. No part of this manual may be repro- duced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.
  • Page 4 Chapter 6, Driver Installation: Provides information on how to install the cPCI-6930 device drivers. Chapter 7, Utilities: Describes the utilities of the cPCI-6930. Chapter 8, BIOS Setup: Describes basic navigation for the AMI BIOS setup utility.
  • Page 5 Conventions Take note of the following conventions used throughout this manual to make sure that users perform certain tasks and instructions properly. Additional information, aids, and tips that help users perform tasks. NOTE: NOTE: Information to prevent minor physical injury, component dam- age, data loss, and/or program corruption when trying to com- plete a task.
  • Page 6 This page intentionally left blank. Preface...

  • Page 7: Table Of Contents

    Overview................1 Features................2 Block Diagram ..............3 Product List................4 Package Contents ............... 5 2 Specifications ..............7 cPCI-6930 Blade Specifications .......... 7 I/O Connectivity ..............10 Power Requirements ............11 3 Functional Description ............ 15 Processors................. 15 Chipset................17 PMC/XMC Site..............
  • Page 8 2.5" SATA Drive Installation..........40 CompactFlash Card Installation......... 47 CFast Card Installation ............51 PMC/XMC Module Installation ........... 54 Installing the cPCI-6930 to the Chassis ......59 6 Driver Installation.............. 61 7 Utilities ................63 Watchdog Timer..............63 Preboot Execution Environment (PXE)......68 8 BIOS Setup ................
  • Page 9 10.3 OEM Commands Summary Table........117 10.4 CompactPCI Address Map ..........121 10.5 Communications with IPMC..........122 10.6 IPMI Sensors List............. 122 10.7 Relevant Documents ............123 Important Safety Instructions ..........125 Getting Service..............127 Table of Contents...
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  • Page 11: List Of Figures

    List of Figures Figure 1-1: cPCI-6930 Functional Block Diagram......3 Figure 4-1: cPCI-6930 Board Layout ..........21 Figure 4-2: cPCI-6930 Assembly Layout ......... 22 Figure 4-3: cPCI-6930 Front Panel ..........23 List of Figures...
  • Page 12 This page intentionally left blank. List of Figures...

  • Page 13: List Of Tables

    List of Tables Table 2-1: cPCI-6930 Blade Specifications ........7 Table 2-2: cPCI-6930 I/O Connectivity ........... 10 Table 4-1: cPCI-6930 Front Panel Status LED Descriptions ..23 List of Tables xiii...
  • Page 14 This page intentionally left blank. List of Tables...

  • Page 15: Introduction

    Introduction 1.1 Overview The cPCI-6930 is a 6U CompactPCI® single board computer fea- turing a single 32nm Intel® Xeon® Processor E5-2400 Series with 8/6/4-cores in LGA1356 socket mated with the Intel® C604 Series Platform Controller Hub. The cPCI-6930 supports three channels of DDR3-1333/1600 ECC registered SDRAM in three RDIMMs channel up to total 48GB capacity.

  • Page 16: Features

    The cPCI-6930 is ideal for server-grade applications, providing datacom equipment providers, system integrators, robust com- puter makers and security sectors a flexible, cost-optimized solu- tion for mission critical applications with a reliable, smooth path for scalability and expansion. 1.2 Features 6U CompactPCI®...

  • Page 17: Block Diagram

    Intel® Xeon® E5 Processor Family SATA 6x USB, PCIe x4 HDA, 5xGPIO, Pericom 82574 PCIe x4 PI7C9X13 82574 PCI 64b/66M SATA 2/3/4 COM4 SAS1/2 IPMC 2.16 2.16 KB/MS IPMB 0/1 COM2/3 J1/J2 J3/J5 Figure 1-1: cPCI-6930 Functional Block Diagram Introduction...

  • Page 18: Product List

    DB-CFast: CFast socket kit for cPCI-6930, including adapter board and mounting hardware DB-6920CF-H: CompactFlash socket kit for cPCI-6930, including adapter board, card guide and mounting hardware DB-SAS: 2.5" SAS drive adapter kit for cPCI-6930 including adapter board and mounting hardware (requires BOM option) Introduction...

  • Page 19: Package Contents

    1.5 Package Contents The cPCI-6930 is packaged with the following components. If any of the items on the contents list are missing or damaged, retain the shipping carton and packing material and contact the dealer for inspection. Please obtain authorization before returning any prod- uct to ADLINK.
  • Page 20 This page intentionally left blank. Introduction...

  • Page 21: Specifications

    • Supports resolutions up to 1920x1440 Gigabit • One Intel® 82580 Gigabit Ethernet controller for 4x Ethernet 10/100/1000BASE-T ports on front panel • Two Intel® 82574L Gigabit Ethernet controllers for 2x 10/100/1000BASE-T port to J3 for PICMG 2.16 Table 2-1: cPCI-6930 Blade Specifications Specifications...
  • Page 22 • PMC/XMC slot • Microsoft Windows 7 32/64-bit Compatibility • Microsoft Windows Server 2008 32/64-bit • Red Hat Enterprise Linux 6.1 x86 64-bit • Fedora 15 x86 64-bit • Other OS support on request Table 2-1: cPCI-6930 Blade Specifications Specifications...
  • Page 23 : Operating 2 Grms, 5-500Hz, each axis w/o hard drive • CE EN55022 • FCC Class A Table 2-1: cPCI-6930 Blade Specifications Notes: 1. The SATA direct connector is removable (DB-6920SAT) and can be replaced with a CompactFlash socket adapter (DB-CF- SC) or CFast socket adapter.

  • Page 24: I/O Connectivity

    Button Reset Button — — — Table 2-2: cPCI-6930 I/O Connectivity Notes: 1. Signals are passed through to the RTM. Available functions are dependent on the specific RTM selected. 2. Available by BOM option and with DB-SAS adapter board; shares space with SATA connector; not available concurrently with COM, USB, PMC/XMC site on layer 2.

  • Page 25: Power Requirements

    2.3 Power Requirements In order to guarantee a stable functionality of the system, it is rec- ommended to provide more power than the system requires. An industrial power supply unit should be able to provide at least twice as much power as the entire system requires of each voltage.
  • Page 26 Intel® Xeon® E5 family processors with 3x 4GB DDR3-1333 RDIMM memory and onboard 320 GB SATA hard disk. The cPCI-6930 is powered by 5V and 3.3V. Power consump- tion at 100% CPU usage was measured by running Intel Power Thermal Utility, Version 1.4.
  • Page 27 Turbo Boost, EIST and Hyper-Threading Technology enabled. 8-core Intel® Xeon® Processor E5-2448L, 1.8GHz, TDP 70W OS/Mode Current 5V (A) Current 3.3V (A) Total Power (W) DOS/Idle mode 6.49 3.88 45.25 Windows XP/Idle mode 3.40 4.48 21.78 Windows XP/ 19.58 4.64...
  • Page 28 This page intentionally left blank. Specifications...

  • Page 29: Functional Description

    Functional Description The following sections describe the cPCI-6930 features and functions. 3.1 Processors The Intel® Xeon® processor E5 family is the next generation of 64-bit, multi-core enterprise processor built on 32-nanometer pro- cess technology. Based on a new micro-architecture, the proces- sor is designed for a two-chip platform.
  • Page 30 Supported Technologies Intel® Virtualization Technology (Intel® VT) Intel® Virtualization Technology (Intel® VT-x) Intel® Trusted Execution Technology (Intel® TXT) Intel® Hyper-Threading Technology Intel® 64 Architecture Intel® Turbo Boost Technology AES New Instructions Interfaces Three channels of DDR3 memory with one RDIMM per channel Memory DDR3 data transfer rates of 80 MT/s, 1666 MT/s, 1333 MT/s, and 1600 MT/s...

  • Page 31: Chipset

    Firmware Hub (FWH) interface support Serial Peripheral Interface (SPI) support 3.3 PMC/XMC Site The cPCI-6930 supports one PMC or XMC site for front panel I/O expansion. The PMC site provides a maximum 32/64-bit, 33/66/133MHz PCI bus link using a Pericom PI7C9X130 PCIe-to-PCI-X bridge and PCIe x4 link.

  • Page 32: Intel® Turbo Boost Technology

    3.4 Intel® Turbo Boost Technology Intel Turbo Boost Technology is a feature that allows the processor to opportunistically and automatically run faster than its rated operating core and/or render clock frequency when there is suffi- cient power headroom, and the product is within specified temper- ature and current limits.

  • Page 33: Tpm

    3.6 TPM The cPCI-6930 is equipped with the Infineon SLB 9635 TT 1.2 Trusted Platform Module (TPM), a security controller with crypto- graphic functionality that provides users a secure environment in e-commerce transactions and Internet communications. The key features provided by the TPM are:...
  • Page 34 This page intentionally left blank. Functional Description...

  • Page 35: Board Interfaces

    Board Interfaces This chapter illustrates the board layout, connector pin assignments, and jumper settings of the cPCI-6930. 4.1 cPCI-6930 Board Layout CN11 CN12 CN13 CN14 DIMM1/2/3 CN16 CNX2 CNX3 CNX1 CPU socket CN1/2/3/4 GbE ports Intel C604 PCH DB-6920SAT conn.

  • Page 36: Cpci-6930 Assembly Layout

    4.2 cPCI-6930 Assembly Layout The dual-slot width cPCI-6930 is comprised of the cPCI-6930 sin- gle-slot main board and the DB-6930L2 riser card to provide a PMX/XMC site. DB-6930L2 Figure 4-2: cPCI-6930 Assembly Layout Board Interfaces...

  • Page 37: Cpci-6930 Front Panel

    (LED 2s on, 1s off) No Watchdog event Watchdog event alert No drive activity Amber SATA, CF data read/write in Blink process Table 4-1: cPCI-6930 Front Panel Status LED Descriptions Note : Disabled by default. See “OemSetBlueLEDLongBlinking” on page 118 Board Interfaces...

  • Page 38: Connector Pin Assignments

    4.4 Connector Pin Assignments See “cPCI-6930 Board Layout” on page 21 for connector locations. USB 2.0 Connectors Pin # Signal Name UV0- UV0+ USB 3.0 Connectors Pin # Signal Name USB3.0_P5VA USB2_CMAN USB2_CMAP USB3A_CMRXN USB3A_CMRXP USB3A_CMTXN USB3A_CMTXP VGA Connector (DB-15)
  • Page 39 Gigabit Ethernet Connectors (RJ-45) Pin # GbE Signal LAN_TX0+ LAN_TX0- LAN_TX1+ LAN_TX2+ LAN_TX2- LAN_TX1- Speed Activity LAN_TX3+ LAN_TX3+ Speed LED Activity LED Status (CN4, CN5) (Green/Amber) (Amber) Network link is not established or system powered off Link 10 Mbps...
  • Page 40 Serial ATA Connector on DB-6930SAT Pin # Signal Signal Power Reserved P13~P15 Board Interfaces...
  • Page 41 DB-6930L2 Board-to-Board Connector (CN6) Signal Name Pin # Pin # Signal Name PCIE-A-TXN0 PCIE-A-RXN0 PCIE-A-TXP0 PCIE-A-RXP0 PCIE-A-TXN1 PCIE-A-RXN1 PCIE-A-TXP1 PCIE-A-RXP1 PCIE-A-TXN2 PCIE-A-RXN2 PCIE-A-TXP2 PCIE-A-RXP2 PCIE-A-TXN3 PCIE-A-RXN3 PCIE-A-TXP3 PCIE-A-RXP3 PCIE-A-CLKN PCIE-B-CLKN PCIE-A-CLKP PCIE-B-CLKP PCIE-B-TXN0 PCIE-B-RXN0 PCIE-B-TXP0 PCIE-B-RXP0 PCIE-B-TXN1 PCIE-B-RXN1 PCIE-B-TXP1...
  • Page 42 Signal Name Pin # Pin # Signal Name PCIE-B-TXN5 PCIE-B-RXN5 PCIE-B-TXP5 PCIE-B-RXP5 PCIE-B-TXN6 PCIE-B-RXN6 PCIE-B-TXP6 PCIE-B-RXP6 PCIE-B-TXN7 PCIE-B-RXN7 PCIE-B-TXP7 PCIE-B-RXP7 USB_N XMC-RST USB_P USB_OC1 RESET COM-RTS COM-DTR COM-RX COM-CTS COM-TX COM-RI COM-DSR IPMI_DBR_TX COM-DCD IPMI_DBR_RX SMBUS-DAT SMBUS-CLK +3.3V +3.3V +3.3V +3.3V +3.3V +3.3V...
  • Page 43 DB-6930SAT Connector (CN8) Signal Name Pin # Pin # Signal Name P3V3 P3V3 P3V3 P3V3 P1V8 P1V8 P1V8 SATA-TXN0 SATA-TXP0 SATA-RXN0 SATA-RXP0 RESET# Board Interfaces...
  • Page 44 PMC Connector on DB-6930-L2 (JN1, JN2) Pin# JN1 Signal JN2 Signal PMC_TCK P12V N12V* PMC_TRST-L PMC_TMS PCIX_INTA-L NC (PMC_TDO) PCIX_INTB-L PMC_TDI PCIX_INTC-L PMC_MOD-L1 PCIX_INTD-L PMC_MOD-L2 P3V3_PMCAUX P3V3 CLK66_PCIX_PMC PMC_RST-L PMC_MOD-L3 P3V3 PCIX_GNT-L0 PMC_MOD-L4 PCIX_REQ-L0 PMC_PME-L PMC_VIO PCIX_AD30 PCIX_AD31 PCIX_AD29 PCIX_AD28 PCIX_AD27 PCIX_AD26 PCIX_AD25...
  • Page 45 Pin# JN1 Signal JN2 Signal PCIX_FRAME-L PCIX_TRDY-L PCIX_IRDY-L P3V3 PCIX_DEVSEL-L PCIX_STOP-L PCIX_PCIXCAP PCIX_PERR-L PCIX_LOCK-L P3V3 PCIX_SERR-L PCIX_PAR PCIX_CBE-L1 PMC_VIO PCIX_AD14 PCIX_AD15 PCIX_AD13 PCIX_AD12 PCIX_M66EN PCIX_AD11 PCIX_AD10 PCIX_AD9 PCIX_AD8 P3V3 PCIX_AD7 PCIX_CBE-L0 PCIX_AD6 P3V3 PCIX_AD5 PCIX_AD4 PMC_VIO PCIX_AD3 PCIX_AD2 PCIX_AD1...
  • Page 46 XMC Connector on DB-6930L2 Pin# 3.3V VPWR Not used PCIE_RST-L 3.3V VPWR Not used Not used 3.3V VPWR Not used +12V 3.3V VPWR Not used -12V Not used VPWR Not used Not used VPWR Not used 3.3V VPWR Not used Not used VPWR Not used...
  • Page 47 CompactPCI J1 Connector Pin Assignment REQ64# ENUM# +3.3V V(I/O) ACK64# P3V3 CPCI_AD4 CPCI_AD3 CPCI_AD2 CPCI_AD7 P3V3 CPCI_AD6 CPCI_AD5 P3V3 CPCI_AD9 CPCI_AD8 CPCI_M66EN CPCI_CBE-L0 GND CPCI_AD12 CPCI_AD11 CPCI_AD10 P3V3 CPCI_AD15 CPCI_AD14 CPCI_AD13 CPCI_SERR-L P3V3 CPCI_PAR CPCI_CBE-L1 GND P3V3 IPMB_CLK IPMB_DAT...
  • Page 48 CompactPCI J2 Connector Pin Assignment CLK6 CLK5 RSTBTN# REQ6# GNT6# DEG# FAL# REQ5# GNT5# AD35 AD34 AD33 AD32 AD38 V(I/O) AD37 AD36 AD42 AD41 AD40 AD39 AD45 V(I/O) AD44 AD43 AD49 AD48 AD47 AD46 AD52 V(I/O) AD51 AD50 AD56 AD55 AD54 AD53 AD59...
  • Page 49 CompactPCI J3 Pin Assignment Pin Z 19 GND HDA_RST# HDA_SYNC HDA_BIT_CLK HDA_SDOUT HDA_SDIN0 18 GND HDA_SDIN1 HDA_SDIN2 HDA_DOCK_EN# HAD_DOCK_RST# GND 17 GND KBDATA KBCLK MSDATA MSCLK 16 GND SATA-TX4+ SATA -TX4- SATA -TX3+ SATA -TX3- 15 GND 14 GND...
  • Page 50 CompactPCI J5 Pin Assignment PCIE-TX0+ PCIE-TX0- PCIE-RX0+ PCIE-RX0- PCIE-TX1+ PCIE-TX1- PCIE-RX1+ PCIE-RX1- PCIE-TX2+ PCIE-TX2- PCIE-RX2+ PCIE-RX2- PCIE-TX3+ PCIE-TX3- PCIE-RX3+ PCIE-RX3- PCIE-CLK+ PCIE-CLK- RESET# GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 LAN4_100# LAN3_100# LAN3_1G# LAN4_1G# SATA-TX3+ SATA-TX3- SATA-RX3+ SATA-RX3- SAS_TXP1* SAS_TXN1* SAS_TXP2* SAS_TXN2* SAS_RXP1* SAS_RXN1* SAS_RXP2*...

  • Page 51: Switches

    4.5 Switches See “cPCI-6930 Board Layout” on page 21 for switch locations. System Reset Button (SW5) The cPCI-6930 comes with a system reset button on the front panel. Press switch SW5 to reset the system. Clear CMOS Button (SW2) The cPCI-6930 comes with a clear CMOS button to reset the CMOS values to default.
  • Page 52 This page intentionally left blank. Board Interfaces...

  • Page 53: Getting Started

    2.5"SATA/SAS Drive CompactFlash card CFast Card Installation PMC/XMC Module Installation 5.1 CPU and Heatsink The cPCI-6930 comes with CPU(s) and heatsink pre-installed. Removal of heatsink/CPU by users is not recommended. Please contact your ADLINK service representative for assistance. Getting Started...

  • Page 54: Sata Drive Installation

    5.2 2.5" SATA Drive Installation The cPCI-6930 series provide space to install a slim type 2.5” SATA drive. 1. 1.Find the 2.5" SATA drive daughter board DB-6920SAT and screw kit in the package. 2. Remove the 5 screws securing the DB-6930L2 shown below.
  • Page 55 3. Remove the 4 screws from the front panel as shown below. 4. Remove the DB-6930L2 daughter board. Getting Started...
  • Page 56 5. Find the standoffs in the screw pack and attach them to the 2.5" drive as shown below. Plug the SATA drive adapter board DB-6920SAT into the SATA drive. 6. Align and assemble the connector on the DB-6920SAT to the cPCI-6930's onboard SATA connector (CN8). Getting Started...
  • Page 57 7. Secure the SATA drive assembly with two screws shown as below. 8. There are four screws and four lock washers in the screw pack. Getting Started...
  • Page 58 9. Place the lock washers on the screws. 10.Turn over the board (solder side up) and fasten the screws as shown below. Getting Started...
  • Page 59 11. Reinstall the DB-6930L2 daughter board by securing the screws removed in step 2 above. 12.Replace the screws on the front panel removed in step 3 above. Getting Started...
  • Page 60 13.The SATA drive assembly installation is completed. 2.5” SAS Drive Installation If you have ordered the SAS BOM option, follow the above instruc- tions using the 2.5" SAS drive daughter board included in the DB-SAS adapter kit. and follow the above procedure to install the SAS drive.

  • Page 61: Compactflash Card Installation

    5.3 CompactFlash Card Installation The cPCI-6930 Series provides space to install a CompactFlash card. The CompactFlash adapter can be purchased using the ordering code DB-6920CF-H. 1. Find the CompactFlash adapter DB-6920CF-H in the CompactFlash kit. 2. Refer to “2.5” SATA Drive Installation, steps 2 to 4 to remove the DB-6930L2 daughter board 3.
  • Page 62 5. Place two standoffs on the adapter board in the mount- ing locations indicated by the arrows, and align the two mounting holes on the adapter board with the soldered standoffs circled below. Getting Started...
  • Page 63 6. Find the two flathead screws shown below in the Com- pactFlash kit. 7. With the DB-6920CF-H adapter board aligned as shown, press it onto the onboard SATA connector (CN8). Use the two flathead screws to fasten the CompactFlash adapter board.
  • Page 64 8. Turn the cPCI-6930 board over (solder side up) and secure the CompactFlash adapter board with the 2 remaining screws. 9. The CompactFlash adapter board assembly installation is completed. Getting Started...

  • Page 65: Cfast Card Installation

    5.4 CFast Card Installation The cPCI-6930 Series provides space to install a CompactFlash card. The CompactFlash adapter can be purchased using the ordering code DB-CFast. 1. A CFast card can be installed on the onboard SATA con- nector (CN8). The CFast card shares the same space as the 2.5"...
  • Page 66 5. Find the CFast adapter board in CFast adapter kit. 6. Remove the card retaining bracket by removing the two screws shown below on the back of the adapter board. Insert the CFast card into the adapter board and secure the CFast card by replacing the retaining bracket with the two screws.
  • Page 67 7. Align the CFast adapter board with the onboard SATA connector (CN8) and locate the two screws in the CFast adapter kit. 8. Secure the CFast adapter board by fastening the screws as shown below. 9. Refer to SATA hard drive installation steps 11 ~ 12 to replace the DB-6930L2 daughter board and complete the assembly.

  • Page 68: Pmc/Xmc Module Installation

    5.5 PMC/XMC Module Installation The 8HP cPCI-6930D Series provides space to install a PMC or XMC module. 1. To install a PMC/XMC module, first begin removing the DB-6930L2 daughter board by removing the five screws shown below. 2. Remove the four screws as shown below on the front panel and remove the DB-6930L2 daughter board from the blade assembly.
  • Page 69 3. Position the hard drive assembly on the cPCI-6930 so that the standoffs on the hard drive align with the screw holes on the board, and the connector on the DB-6930SAT adapter board is aligned with the board-to-board connector (CN6).
  • Page 70 4. Secure four screws provided by PMC/XMC supplier to the solder side of the DB-6930L2. 5. Remove the filler plate on the front panel. Getting Started...
  • Page 71 6. Install the PMC/XMC module and DB-6930L2 daughter board assembly onto the cPCI-6930D and secure the five screws shown below. 7. Secure the four screws on the front panel. Getting Started...
  • Page 72 8. Mezzanine card installation is completed. Getting Started...

  • Page 73: Installing The Cpci-6930 To The Chassis

    5.6 Installing the cPCI-6930 to the Chassis The cPCI-6930 may be installed in a system or peripheral slot of a 6U CompactPCI chassis. These instructions are for reference only. Refer to the user guide that comes with the chassis for more information.
  • Page 74 This page intentionally left blank. Getting Started...

  • Page 75: Driver Installation

    Driver Installation The cPCI-6930 drivers are available from the ADLINK All-In-One CD at X:\cPCI\cPCI-6930\, or from the ADLINK website (http://www.adlinktech.com). ADLINK provides validated driv- ers for Windows 7 32-bit. We recommend using these drivers to ensure compatibility. The VxWorks BSP can be downloaded from the cPCI-6930 product page on the ADLINK website.
  • Page 76 Driver Installation...

  • Page 77: Utilities

    This section describes the operation of the cPCI-6930’s watchdog timer (WDT). The primary function of the WDT is to monitor the cPCI-6930's operation and to reset the system if a software appli- cation fails to function as programmed. The following WDT func-...

  • Page 78: Sample Code

    Sample Code The sample program written in C shown below offers an interac- tive way to test the Watchdog Timer under DOS. #include<stdio.h> #include<dos.h> static unsigned int W83627UHG_ioPort = 0x2e; void Enter_W83627UHG_Config(unsigned int flag) if(flag) W83627UHG_ioPort = 0x4e; outportb(W83627UHG_ioPort, 0x87); outportb(W83627UHG_ioPort, 0x87);...
  • Page 79 = count_value / 60; if((count_value%60) > 30) tempCount++; if(tempCount > 255) tempCount = 255; printf("WDT timeout in %d minutes.\n", tempCount); else outportb(W83627UHG_ioPort, 0xf5); registerValue = inportb(W83627UHG_ioPort+1); registerValue &= 0xfb; outportb(W83627UHG_ioPort+1, registerValue); / / set second mode tempCount = count_value;...
  • Page 80 registerValue |= 0x02; // set GPIO2 is active outportb(W83627UHG_ioPort+1, registerValue); outportb(W83627UHG_ioPort, 0xe4); registerValue = inportb(W83627UHG_ioPort+1); registerValue &= 0xf7; // set GPIO23 is output function outportb(W83627UHG_ioPort+1, registerValue); outportb(W83627UHG_ioPort, 0xe5); registerValue = inportb(W83627UHG_ioPort+1); registerValue &= 0xf7; // set GPIO23 is outportb(W83627UHG_ioPort+1, registerValue); printf("WDT timeout in %d seconds.\n", tempCount);...
  • Page 81 = inportb(W83627UHG_ioPort+1); registerValue |= 0x08; // set GPIO23 is High outportb(W83627UHG_ioPort+1, registerValue); printf("WDT is Disabled.\n"); outportb(W83627UHG_ioPort, 0x07); outportb(W83627UHG_ioPort+1, 8); // CR07 set Logical Device 8 outportb(W83627UHG_ioPort, 0xf6); outportb(W83627UHG_ioPort+1, tempCount); // set WDT count value.. void Exit_W83627UHG_Config(unsigned int flag) if(flag) W83627UHG_ioPort = 0x4e;...

  • Page 82: Preboot Execution Environment (Pxe)

    7.2 Preboot Execution Environment (PXE) The cPCI-6930 supports the Intel® Preboot Execution Environ- ment (PXE) that is capable of booting up or executing an OS installation through an Ethernet ports. To use PXE, there must be a DHCP server on the network with one or more servers running PXE and MTFTP services.

  • Page 83: Bios Setup

    BIOS Setup The following chapter describes basic navigation for the AMI EFI BIOS setup utility. 8.1 Starting the BIOS To enter the setup screen, follow these steps: 1. Power on the motherboard 2. Press the < Delete > key on your keyboard when you see the following text prompt: <...
  • Page 84 Setup Menu The main BIOS setup menu is the first screen that you can navi- gate. Each main BIOS setup menu option is described in this user’s guide. The Main BIOS setup menu screen has two main frames. The left frame displays all the options that can be configured.
  • Page 85 There is a hot key legend located in the right frame on most setup screens. NOTE: NOTE: The < F8 > key on your keyboard is the Fail-Safe key. It is not dis- played on the key legend by default. To set the Fail-Safe settings of the BIOS, press the <...
  • Page 86 The < F2 > key on your keyboard is the previous values key. It is not displayed on the key legend by default. To set the previous values settings of the BIOS, press the < F2 > key on your keyboard. It is located on the upper row of a stan- dard 101 keyboard.
  • Page 87 Press the < Enter > key to save the configuration and exit. You can also use the < Arrow > key to select Cancel and then press the < Enter > key to abort this function and return to the previous screen.

  • Page 88: Main Setup

    8.2 Main Setup When you first enter the Setup Utility, you will enter the Main setup screen. You can always return to the Main setup screen by select- ing the Main tab. There are two Main Setup options. They are described in this section.

  • Page 89: Advanced Bios Setup

    8.3 Advanced BIOS Setup Select the Advanced tab from the setup screen to enter the Advanced BIOS Setup screen. You can select any of the items in the left frame of the screen, such as SuperIO Configuration, to go to the sub menu for that item.
  • Page 90 8.3.1 PCI Subsystem Settings PCI ROM Priority In case of multiple Option ROMs (Legacy and EFI Compatible), specifies what PCI Option ROM to launch. Options: EFI Com- patible ROM, Legacy ROM. PCI Latency Timer Value to be programmed into PCI Latency Timer Register. Options: 32 PCI Bus Clocks, 64 PCI Bus Clocks, 96 PCI Bus Clocks, 128 PCI Bus Clocks, 160 PCI Bus Clocks, 192 PCI Bus Clocks, 224 PCI Bus Clocks, 248 PCI Bus Clocks.
  • Page 91 8.3.2 Trusted Computing Trusted computing is an industry standard to make personal com- puters more secure through a dedicated hardware chip, called a Trusted Platform Module (TPM). This option allows you to enable or disable the TPM support. TPM Support OS will not show TPM.
  • Page 92 8.3.3 CPU Configuration You can use this screen to select options for the CPU Configura- tion Settings. Use the up and down < Arrow > keys to select an item. Use the < + > and < - > keys to change the value of the selected option.
  • Page 93 Socket 0 CPU Information An example of the CPU Information screen is shown below. Hyper-Threading Enables/disables Hyper-Threading Technology. Enable for Win- dows XP and Linux (OS optimized for Hyper-Threading Technol- ogy) and disable for other OS (OS not optimized for Hyper- Threading Technology.
  • Page 94 CPU Power Management Configuration Power Technology Enable the power management features. Options: Energy Effi- cient, Disable, Custom. Energy Performance Optimize between performance and power savings. Windows 2008 and later OSes overrides this value according to its power plan. Options: Performance, Balanced Performance, Balanced Energy, Energy Efficient.
  • Page 95 8.3.4 SATA Configuration SATA Mode The SATA interface can be disabled or configured as a legacy IDE, RAID and AHCI mode. SATA Controllers This item the SATA Controllers. Serial-ATA Controller 0 settings are Disabled, Enhanced and Compatible. Serial-ATA Controller 1 settings are Disabled and Enhanced.
  • Page 96 8.3.5 SAS Configuration BIOS Setup...
  • Page 97 8.3.6 USB Configuration Legacy USB Support Enables legacy USB support. Auto option disables legacy sup- port if no USB devices are connected. Disable option will keep USB devices available only for EFI applications. Options: Enable/Disable/Auto USB 3.0 Support Enable/Disable USB3.0 (XHCI) Controller support. Options: Enabled, Disabled.
  • Page 98 8.3.7 H/W Monitor You can use this screen to check system health status. BIOS Setup...
  • Page 99 8.3.8 Super IO Configuration Serial Port 1/2/3/4 Configuration Set Parameters of Serial Port 1,2,3,4 (COM A,B,C,D). Options: Enabled/Disabled. A sample screen is shown below. Base I/O port address and interrupt request address of Serial Port 1,2,3,4: Serial Port 1 Configuration (Front Panel): IO=3F8h; IRQ=4;...
  • Page 100 8.3.9 Serial Port Console Redirection The settings specify how the host computer and the remote computer will exchange data. Both computers should have the same or compatible settings. Console Redirection Enable or disable Console Redirection. BIOS Setup...
  • Page 101 Console Redirection Settings Terminal Type VT-UTF8 is the preferred terminal type for out-of-band man- agement. The next best choice is VT100+ and then VT100. Options: VT100, VT100+, VT-UTF8, ASNI. Bits per Second Select the bit rate (bits/second) you want the serial port to use for console redirection.
  • Page 102 Communication with slow devices may require more than 1 stop bit. Set this value to 1 or 2. Flow Control Set this option to select Flow Control for console redirection. The settings for this value are None and Hardware RTS/CTS. VT-UTF8 Combo Key Support Enabled VT-UTF8 combination key support for ANSI/VT100 terminals.
  • Page 103 8.3.10 Network Stack Network Stack Enable, Disable the network stack (PXE and UEFI). Options: Disable, Enable. BIOS Setup...
  • Page 104 8.3.11 iSCSI iSCSI Initiator Name The worldwide unique name of the initiator. Only IQN format is accepted. BIOS Setup...
  • Page 105 Main Configuration Page Blink LEDs (range 0-15 seconds) Blink LEDs for the specified duration (up to 15 seconds). Set this value to 0~15. Link Status Link Status. Alternate MAC Address Alternate assigned MAC address of Ethernet port. BIOS Setup...
  • Page 106 NIC Configuration Link Speed Change link speed and duplex for current port. Options: AutoNeg, 10 Mbps Half, 10 Mbps Full, 100 Mbps Half, 100 Mbps Full. Wake on LAN Enable this option to wake the system with a magic packet. Options: Disabled, Enabled.

  • Page 107: Chipset Configuration

    8.4 Chipset Configuration Select the Chipset tab from the setup screen to enter the Chipset BIOS Setup screen. You can select any of Chipset BIOS Setup options by highlighting it using the < Arrow > keys. The Chipset BIOS Setup screen is shown below.
  • Page 108 8.4.1 North Bridge Configuratio IOH Configuration VGA Priority Decides priority between onboard and 1st off-board video device found. Options: Onboard, BIOS Setup...
  • Page 109 Intel VT-d for Directed I/O Configuration Intel VT-d Enables/disables Intel® Virtualization Technology for Directed I/O (VT-d). Coherency Support VT-d Engine Coherency support. Options: Enabled/Disabled. ATS Support VT-d Engine Address Translation Services (ATS) support. Options: Enabled/Disabled. BIOS Setup...
  • Page 110 DIMM Information BIOS Setup...
  • Page 111 8.4.2 South Bridge Configuration SMBus Controller The SMBus controller. Options: Enabled/Disabled. Disable SCU devices Patsburg SCU devices. Options: Enabled/Disabled. Onboard SAS Oprom Onboard SAS OpROM if launch storage OpROM is enabled. Options: Enabled/Disabled. Onboard SATA RAID OpROM Onboard SATA RAID OpROM if launch storage OpROM is enabled.
  • Page 112 USB Configuration All USB Devices Enable/Disable all USB devices. Options: Enabled/Disabled. EHCI Controller 1, 2 Support USB 2.0 (EHCI). Options: Enabled/Disabled. USB Port 0, 1, 2, 8, 9, 10, 11, 12, 13 Enable/Disable USB port. Options: Enabled/Disabled. BIOS Setup...

  • Page 113: Boot Settings

    8.5 Boot Settings Setup Prompt Timeout Set this number of seconds to wait for setup activation key. 1~65535 (0xFFFF) means indefinite waiting. Bootup NumLock State Set this value to allow the Number Lock setting to be modified dur- ing boot up. Off - This option does not enable the keyboard Num- ber Lock automatically.
  • Page 114 Quiet Boot Disabled - Set this value to allow the computer system to display the POST messages. Enabled - Set this value to allow the computer system to display the OEM logo. GateA20 Active This option is useful when any RT code is executed above 1MB. Upon Request - GA20 can be disabled using BIOS ser- vices.

  • Page 115: Security Setup

    8.6 Security Setup Administrator, User Password If only the administrator's password is set, then this only limits access to setup and is only asked for when entering setup. If only the user's password is set, then this is a power on password and must be entered to boot or enter setup.

  • Page 116: Save & Exit Menu

    8.7 Save & Exit Menu Select the Save & Exit tab from the setup screen to enter the Save & Exit BIOS Setup screen. You can display an Exit BIOS Setup option by highlighting it using the < Arrow > keys. The Save & Exit BIOS Setup screen is shown below.
  • Page 117 Discard Changes and Exit Exit system setup without saving any changes. Save Changes and Reset Reset the system after saving the changes. Discard Changes and Reset Reset system setup without saving any changes. Save Changes Save changes done so far to any of the setup options.
  • Page 118 Discard Changes Discard changes done so far to any of the setup options. Restore Defaults Restore/Load Defaults values for all the setup options. Save as User Defaults Save the changes done so far as user defaults.. Restore User Defaults Save changes done so far to any of the setup options. BIOS Setup...

  • Page 119: Checkpoints & Beep Codes

    Checkpoints & Beep Codes 9.1 Checkpoint Ranges Status Code Range Description 0x01 – 0x0B SEC execution 0x0C – 0x0F SEC errors PEI execution up to and including memory 0x10 – 0x2F detection 0x30 – 0x4F PEI execution after memory detection 0x50 –...

  • Page 120: Pei Phase

    Status Code Description 0x07 AP initialization after microcode loading North Bridge initialization after microcode 0x08 loading South Bridge initialization after microcode 0x09 loading 0x0A OEM initialization after microcode loading 0x0B Cache initialization SEC Error Codes 0x0C – 0x0D Reserved for future AMI SEC error codes 0x0E Microcode not found 0x0F...
  • Page 121 Status Code Description Pre-memory South Bridge initialization (South 0x1A Bridge module specific) Pre-memory South Bridge initialization (South 0x1B Bridge module specific) Pre-memory South Bridge initialization (South 0x1C Bridge module specific) 0x1D – 0x2A OEM pre-memory initialization codes Memory initialization. Serial Presence Detect...
  • Page 122 Status Code Description Post-Memory South Bridge initialization is 0x3B started Post-Memory South Bridge initialization (South 0x3C Bridge module specific) Post-Memory South Bridge initialization (South 0x3D Bridge module specific) Post-Memory South Bridge initialization (South 0x3E Bridge module specific) 0x3F-0x4E OEM post memory initialization codes 0x4F DXE IPL is started PEI Error Codes...
  • Page 123 Status Code Description 0xE4-0xE7 Reserved for future AMI progress codes S3 Resume Error Codes 0xE8 S3 Resume Failed 0xE9 S3 Resume PPI not Found 0xEA S3 Resume Boot Script Error 0xEB S3 OS Wake Error 0xEC-0xEF Reserved for future AMI error codes...

  • Page 124: Pei Beep Codes

    PEI Beep Codes # of Beeps Description Memory not Installed Memory was installed twice (InstallPeiMemory routine in PEI Core called twice) Recovery started DXEIPL was not found DXE Core Firmware Volume was not found Recovery failed S3 Resume failed Reset PPI is not available DXE Phase Status Code Description...
  • Page 125 Status Code Description North Bridge DXE initialization (North Bridge 0x6F module specific) 0x70 South Bridge DXE initialization is started 0x71 South Bridge DXE SMM initialization is started 0x72 South Bridge devices initialization South Bridge DXE Initialization (South Bridge 0x73...
  • Page 126 Status Code Description 0xA0 IDE initialization is started 0xA1 IDE Reset 0xA2 IDE Detect 0xA3 IDE Enable 0xA4 SCSI initialization is started 0xA5 SCSI Reset 0xA6 SCSI Detect 0xA7 SCSI Enable 0xA8 Setup Verifying Password 0xA9 Start of Setup Reserved for ASL (see ASL Status Codes 0xAA section below) 0xAB...

  • Page 127: Dxe Beep Codes

    Status Code Description Some of the Architectural Protocols are not 0xD3 available 0xD4 PCI resource allocation error. Out of Resources 0xD5 No Space for Legacy Option ROM 0xD6 No Console Output Devices are found 0xD7 No Console Input Devices are found...

  • Page 128: Oem-Reserved Checkpoint Ranges

    ACPI/ASL Checkpoints Status Code Description 0x01 System is entering S1 sleep state 0x02 System is entering S2 sleep state 0x03 System is entering S3 sleep state 0x04 System is entering S4 sleep state 0x05 System is entering S5 sleep state 0x10 System is waking up from the S1 sleep state 0x20...

  • Page 129: Ipmi User Guide

    10 IPMI User Guide 10.1 Introduction This chapter is written for those who already have a basic under- standing of the newest implementation of the baseboard manage- ment controller (BMC) of the Intelligent Platform Management Interface (IPMI) specification rev. 1.5. It also describes the OEM extension IPMI command usages which are not listed in the IPMI specification.
  • Page 130 IPMI IPM Controller Req Command NetFn Spec (PICMG 2.9) Platform Event (a.k.a. 23.3 Optional “Event Message”) Sensor Device Commands Get Device SDR Info 29.2 Optional Get Device SDR 29.3 Optional Reserve Device SDR 29.4 Optional Repository Set Sensor Hysteresis 29.6 Optional Get Sensor Hysteresis 29.7...

  • Page 131: Oem Commands Summary Table

    10.3 OEM Commands Summary Table Command NetFn Code Cmd Code OemShowRevision OEM (C0h) OemRescanGaInput OEM (C0h) OemTestFunction OEM (C0h) OemSetBlueLEDLongBlinking OEM (C0h) OemReportGeoAddress OEM (C0h) OemEnableSmbus OEM (C0h) OemDisableSmbus OEM (C0h) OemDispDebugVariable OEM (C0h) OemResetHost OEM (C0h) OemPowerOff OEM (C0h)
  • Page 132 OemRescanGaInput This command is used to rescan the geo-address input pins and reset the IPMB address according to the input value. Action Byte Value Description NetFn/LUN for OEM Request OEM defined command Complete Code 00h means OK Response New IPMB address New IPMB address value OemTestFunction Internal test purposes only.
  • Page 133 OemReportGeoAddress This command can report the IPMB address, the GA pin input sta- tus, and the event forwarding control value. Action Byte Value Description NetFn/LUN for OEM Request OEM defined command Complete Code 00h means OK IPMB address IPMB address value...
  • Page 134 OemDispDebugVariable This command can report up to 5 interval values for debug pur- poses. For developers only. Action Byte Value Description NetFn/LUN for OEM Request OEM defined command Complete Code 00h means OK *Debug variable 1 *Debug variable 2 Response *Debug variable 3 *Debug variable 4 *Debug variable 5...

  • Page 135: Compactpci Address Map

    Action Byte Value Description Response Complete Code 00h means OK OemPowerOn This command is implemented to control the system’s status if power-on is required. Operators can control the system remotely. Action Byte Value Description NetFn/LUN for OEM Request OEM defined command...

  • Page 136: Communications With Ipmc

    CompactPCI Peripheral Address Mapping Geo. Addr. IPMB Addr. Geo. Addr. IPMB Addr. Disabled 10.5 Communications with IPMC Operating systems need to use a serial port to communicate with the IPMC. The resource setting of the serial port must be IO: 0x2E8 and IRQ: 7.

  • Page 137: Relevant Documents

    10.7 Relevant Documents Document Title Revision Source Intelligent Platform Document Revision 1.1 Intel Corp. Management Interface February 20, 2002 http://www.intel.com/design/ Specification v1.5 servers/ipmi/license_ipmi.htm PICMG 2.9 D1.0 January 21, 2000 CompactPCI System Management Specification Intelligent Platform Document Revision 0.15 Intel Corp.
  • Page 138 This page intentionally left blank. IPMI User Guide...

  • Page 139: Important Safety Instructions

    Important Safety Instructions For user safety, please read and follow all instructions, WARNINGS, CAUTIONS, and NOTES marked in this manual and on the associated equipment before handling/operating the equipment. Read these safety instructions carefully. Keep this user’s manual for future reference.
  • Page 140 Never attempt to fix the equipment. Equipment should only be serviced by qualified personnel. A Lithium-type battery may be provided for uninterrupted, backup or emergency power. Risk of explosion if battery is replaced with one of an incorrect type. Dispose of used batteries appropriately. WARNING: Equipment must be serviced by authorized technicians when:...

  • Page 141: Getting Service

    San Jose, CA 95138, USA Tel: +1-408-360-0200 Toll Free: +1-800-966-5200 (USA only) Fax: +1-408-360-0222 Email: info@adlinktech.com ADLINK Technology (China) Co., Ltd. Address: (201203) 300 Fang Chun Rd., Zhangjiang Hi-Tech Park Pudong New Area, Shanghai, 201203 China Tel: +86-21-5132-8988 Fax: +86-21-5132-3588 Email: market@adlinktech.com...
  • Page 142 84 Genting Lane #07-02A, Cityneon Design Centre Singapore 349584 Tel: +65-6844-2261 Fax: +65-6844-2263 Email: singapore@adlinktech.com ADLINK Technology Singapore Pte. Ltd. (Indian Liaison Office) Address: #50-56, First Floor, Spearhead Towers Margosa Main Road (between 16th/17th Cross) Malleswaram, Bangalore - 560 055, India Tel: +91-80-65605817, +91-80-42246107 Fax:...

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