Mitsubishi Electric R16MTCPU Programming Manual page 79

Processing details
■Controls
• For a Multiple CPU system configuration, the bit device specified with (D1) of the target CPU (n1) turns ON or OFF with the
bit operation of (n2).
If reading a bit device of the target CPU, use the M(P).DDRD/D(P).DDRD instructions. Refer to the following
for details on the M(P).DDRD/D(P).DDRD instructions.
MELSEC iQ-R Programming Manual (Instructions, Standard Functions/Function Blocks)
■Operation
Outline operation between CPUs at the MP.BITWR and DP.BITWR instruction execution is shown below.
• MP.BITWR instruction
Sequence program
MP.BITWR instruction
CPU dedicated transmission
(Non-fixed cycle)
Target CPU MP.BITWR
accept processing
Complete device (D2+0)
Status display device (D2+1)
at the completion
• DP.BITWR instruction
Sequence program
DP.BITWR instruction
CPU dedicated transmission
(Fixed cycle)
Communication
cycle
Target CPU DP.BITWR
accept processing
Complete device (D2+0)
Status display device (D2+1)
at the completion
*1 Set in [System Parameter]  [Multiple CPU settings] in GX Works3
END
MP.BITWR
ON
execution
Request data set
Transfer Transfer
MP.BITWR accept
processing
END
DP.BITWR
ON
execution
Request data set
Transfer
*1
DP.BITWR accept
processing
END END
Response
data set
ON
ON: Abnormal completion only
1 scan
END END
Transfer
Response
data set
ON
ON: Abnormal
completion only
1 scan
2 MOTION DEDICATED PLC INSTRUCTION
2.2 Motion Dedicated PLC Instruction
2
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