Error Handling - Motorola MVME5100 Programmer's Reference Manual

The CONFIG_ADDRESS and CONFIG_DATA registers are actually
represented in PCI space to the processor and are subject to the Endian
functions. For example, the powerup location of the CONFIG_ADDRESS
register with respect to the PPC bus is $80000cf8 when the PHB is in Big-
Endian mode. When the PHB is switched to Little-Endian mode, the
CONFIG_ADDRESS register with respect to the PPC bus is $80000cfc.
Note that in both cases the address generated internal to the processor will
be $80000cf8.
The contents of the CONFIG_ADDRESS register are not subject to the
Endian function.
The data associated with PIACK accesses is subject to the Endian
swapping function. The address of a PIACK cycle is undefined; therefore,
address modification during Little-Endian mode is not an issue.

Error Handling

The PHB is capable of detecting and reporting the following errors to one
or more PPC masters:
Each of these error conditions will cause an error status bit to be set in the
PPC Error Status Register (ESTAT). If a second error is detected while any
of the error bits is set, the OVFL bit is asserted, but none of the error bits
are changed. Each bit in the ESTAT may be cleared by writing a 1 to it;
writing a 0 to it has no effect. New error bits may be set only when all
previous error bits have been cleared.
http://www.motorola.com/computer/literature
XBTO - PPC address bus time-out
XDPE - PPC data parity error
PSMA - PCI master signalled master abort
PRTA - PCI master received target abort
PPER - PCI parity error
PSER - PCI system error
Functional Description
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