Motorola MVME166IG/D2 Installation Manual
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Motorola MVME166IG/D2 Installation Manual

Motorola MVME166IG/D2 Installation Manual

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MVME166
Single Board Computer
Installation Guide
(MVME166IG/D2)

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Summary of Contents for Motorola MVME166IG/D2

  • Page 1 MVME166 Single Board Computer Installation Guide (MVME166IG/D2)
  • Page 2 Motorola, Inc. assumes no liability resulting from any omissions in this document, or from the use of the information obtained therein. Motorola reserves the right to revise this document and to make changes from time to time in the content hereof without obligation of Motorola to notify any person of such revision or changes.
  • Page 3 Preface This manual provides general board level hardware description, hardware preparation and installation instructions, debugger general information, and using the debugger; for the MVME166 Single Board Computer. This manual is intended for anyone who wants to provide OEM systems, supply additional capability to an existing compatible system, or work in a lab environment for experimental purposes.
  • Page 4 The computer programs stored in the Read Only Memory of this device contain material copyrighted by Motorola Inc., first published 1990, and may be used only under a license such as the License for Computer Programs (Article 14) contained in Motorola’s Terms and Conditions of Sale, Rev.
  • Page 5 The safety precautions listed below represent warnings of certain dangers of which Motorola is aware. You, as the user of the product, should follow these warnings and all other safety precautions necessary for the safe operation of the equipment in your operating environment.
  • Page 6 Because of the danger of introducing additional hazards, do not install substitute parts or perform any unauthorized modification of the equipment. Contact your local Motorola representative for service and repair to ensure that safety features are maintained. Dangerous Procedure Warnings.

  • Page 7: Table Of Contents

    CHAPTER 1 BOARD LEVEL HARDWARE DESCRIPTION Introduction ...1-1 Overview...1-1 Related Documentation ...1-2 Requirements...1-5 Features ...1-5 Specifications ...1-6 Manual Terminology ...1-6 Block Diagram ...1-8 Functional Description ...1-9 Front Panel Switches and Indicators...1-9 Data Bus Structure ...1-10 MC68040 MPU ...1-10 Flash Memory and Download EPROM...1-10 SRAM...1-11 Onboard DRAM ...1-12 Battery Backed Up RAM and Clock...1-13...
  • Page 8 VMEbus Accesses to the Local Bus... 1-22 VMEbus Short I/O Memory Map...1-22 VSB Memory Map ...1-22 CHAPTER 2 HARDWARE PREPARATION AND INSTALLATION Introduction ...2-1 Unpacking Instructions...2-1 Hardware Preparation ...2-1 SCSI Terminator Enable Header J2 ...2-2 General Purpose Readable Jumpers on Header J3 ...2-4 System Controller Header J6...2-4 SRAM Backup Power Source Select Header J7 ...2-5 Installation Instructions ...2-6...
  • Page 9 Device Probe Function ... 3-16 Disk I/O via 166Bug Commands ... 3-16 IOI (Input/Output Inquiry) ... 3-16 IOP (Physical I/O to Disk) ... 3-16 IOT (I/O Teach) ... 3-16 IOC (I/O Control)... 3-17 BO (Bootstrap Operating System) ... 3-17 BH (Bootstrap and Halt) ... 3-17 Disk I/O via 166Bug System Calls ...
  • Page 10 166Bug Generalized Exception Handler ...4-15 Floating Point Support...4-17 Single Precision Real ...4-18 Double Precision Real ...4-18 Extended Precision Real ...4-18 Packed Decimal Real...4-19 Scientific Notation ...4-19 The 166Bug Debugger Command Set...4-20 APPENDIX A CONFIGURE AND ENVIRONMENT COMMANDS Configure Board Information Block...A-1 Set Environment to Bug/Operating System...A-2 APPENDIX B DISK/TAPE CONTROLLER DATA...
  • Page 11 FIGURES Figure 1-1. MVME166 Block Diagram...1-8 Figure 2-1. MVME166 Switches, Headers, Connectors, Fuses, and LEDs ...2-3 List of Figures...
  • Page 13 TABLES Table 1-1. MVME166 Specifications...1-6 Table 1-2. Local Bus Memory Map ...1-19 Table 1-3. Local I/O Devices Memory Map ...1-20 Table 4-1. Debugger Address Parameter Formats...4-5 Table 4-2. Exception Vectors Used by 166Bug...4-11 Table 4-3. Debugger Commands...4-20 Table A-1. ENV Command Parameters ...A-3 xiii List of Tables...

  • Page 15: Board Level Hardware Description

    HARDWARE DESCRIPTION Introduction This chapter describes the board level hardware features of the MVME166 Single Board Computers. The chapter is organized with a board level overview and features list in this introduction, followed by a more detailed hardware functional description. Front panel switches and indicators are included in the detailed hardware functional description.

  • Page 16: Related Documentation

    The following publications are applicable to the MVME166 and may provide additional helpful information. They may be purchased by contacting your local Motorola sales office. Non-Motorola documents may be purchased from the sources listed. MVME166 Single Board Computer User’s Manual MVME166 Single Board Computer Support Information MVME167Bug Debugging Package User’s Manual...
  • Page 17 MVME166. Although not shown in the above list, each Motorola Computer Group manual publication number is suffixed with characters which represent the revision level of the document, such as "/D2" (the second revision of a manual);...
  • Page 18 Board Level Hardware Description To further assist your development effort, Motorola has collected user’s manuals for each of the peripheral controllers used on the MVME166 from the suppliers. This bundle, which can be ordered as part number 68-1X7DS, includes manuals for the following: NCR 53C710 SCSI Controller Data Manual and Programmer’s Guide...

  • Page 19: Requirements

    (Includes Global CSR for IPC (General Purpose Registers 1 and 2)) – Local bus interrupter – VSB interrupter and VSB interrupt handler – Bidirectional write posting - local bus to VSB and VSB to local bus – EVSB compatible MVME166IG/D2 Introduction...

  • Page 20: Specifications

    Board Level Hardware Description Specifications General specifications for the MVME166 are listed in Table 1-1. Characteristics Power requirements (excluding external LAN transceiver) (at 33 MHz with 32 MB ECC memory) Operating temperature Storage temperature Relative humidity Physical dimensions PC board with mezzanine module only Height Depth...
  • Page 21 The term status bit is used to describe a bit in a register that reflects a specific condition. The status bit can be read by software to determine operational or exception conditions. MVME166IG/D2 Introduction...

  • Page 22: Block Diagram

    Board Level Hardware Description Block Diagram Figure 1-1 is a general block diagram of the MVME166. 82596CA MC68040 ETHERNET DRAM VMEchip2 VMEbus MK48T08 53C710 BBRAM SCSI & CLOCK FLASH Figure 1-1. MVME166 Block Diagram MVME166 Single Board Computer Installation Guide CD2401 PRINTER PORT...

  • Page 23: Functional Description

    The green VSB LED (part of DS5) lights when the MVME166 is using the VSB (VSB PAS* is asserted by the VSBchip2) or when the MVME166 is accessed by the VSB (VSBchip2 is the local bus master). MVME166IG/D2 Functional Description...

  • Page 24: Data Bus Structure

    Board Level Hardware Description Data Bus Structure The local data bus on the MVME166 is a 32-bit synchronous bus that is based on the MC68040 bus, and supports burst transfers and snooping. The various local bus master and slave devices use the local bus to communicate. The local bus is arbitrated by priority type arbiter and the priority of the local bus masters from highest to lowest is: 82596CA LAN, CD2401 serial (through the PCCchip2), 53C710 SCSI, VSB, VMEbus, and MPU.

  • Page 25: Sram

    The lifetime of the battery is very dependent on the ambient temperature of the board and the power-on duty cycle. The lithium battery supplied on the MVME166 should provide at least two years of backup time MVME166IG/D2 Functional Description 1-11...

  • Page 26: Onboard Dram

    Board Level Hardware Description with the board powered off and the board at 40° C. If the power-on duty cycle is 50% (the board is powered on half of the time), the battery lifetime is four years. At lower ambient temperatures the backup time is greatly extended and may approach the shelf life of the battery.

  • Page 27: Battery Backed Up Ram And Clock

    The serial ports support the standard baud rates (110 to 38.4K baud). The four serial ports on the MVME166 are functionally the same. All serial ports are full function asynchronous or synchronous ports. They can operate MVME166IG/D2 Functional Description 1-13...

  • Page 28: Mc68230 Parallel Interface/Timer

    Board Level Hardware Description at synchronous bit rates up to 64 k bits per second. They use RXD, CTS, DCD, TXD, RTS, DTR, and DSR. They also interface to the synchronous clock signal lines. Additional control signals are provided for each serial port by the MC68230.

  • Page 29: Parallel Port Interface

    Because the 82596CA has small internal buffers and the VMEbus has an undefined latency period, buffer overrun may occur if the DMA is programmed to access the VMEbus. Therefore, the 82596CA should not be programmed to access the VMEbus or VSB. MVME166IG/D2 Functional Description 1-15...

  • Page 30: Scsi Interface

    Board Level Hardware Description Every MVME166 is assigned an Ethernet Station Address. The address is $08003E2XXXXX where XXXXX is the unique 5-nibble number assigned to the board (i.e., every MVME166 has a different value for XXXXX). Each module has an Ethernet Station Address displayed on a label attached to the VMEbus P2 connector.

  • Page 31: Programmable Tick Timers

    The MVME166 has a 68-pin mini D ribbon shielded connector for the SCSI bus interface. The MVME166 has a 100-pin mini D ribbon shielded connector for the serial ports, Ethernet, and printer. MVME166IG/D2 Functional Description 1-17...

  • Page 32: Memory Maps

    Board Level Hardware Description Memory Maps There are two points of view for memory maps: 1) the mapping of all resources as viewed by local bus masters (local bus memory map), 2) the mapping of onboard resources as viewed by externa masters (VMEbus memory map or VSB memory map).

  • Page 33: Table 1-2. Local Bus Memory Map

    Cache inhibit depends on devices in area mapped. This area is not decoded. If these locations are accessed and the local bus timer is enabled, the cycle times out and is terminated by a TEA signal. MVME166IG/D2 Memory Maps Software Port Size...

  • Page 34: Table 1-3. Local I/O Devices Memory Map

    Board Level Hardware Description The following table focuses on the Local I/O Devices portion of the local bus Main Memory Map. Table 1-3. Local I/O Devices Memory Map Address Range $FFF00000 - $FFF3FFFF $FFF40000 - $FFF400FF $FFF40100 - $FFF401FF $FFF40200 - $FFF40FFF $FFF41000 - $FFF41FFF $FFF42000 - $FFF42FFF $FFF43000 - $FFF430FF...
  • Page 35 MVME166. If the local bus timer is enabled, the access times out and is terminated by a TEA signal. The VSBchip2 is included only on the MVME166. The Download EPROM is only on the MVME166. MVME166IG/D2 Memory Maps 1-21...

  • Page 36: Vmebus Memory Map

    Board Level Hardware Description VMEbus Memory Map This section describes the mapping of local resources as viewed by VMEbus masters. Default addresses for the slave, master, and GCSR address decoders are provided by the ENV command. Refer to Appendix A. VMEbus Accesses to the Local Bus The VMEchip2 includes a user-programmable map decoder for the VMEbus to local bus interface.

  • Page 37: Hardware Preparation And Installation

    HARDWARE PREPARATION Introduction This chapter provides unpacking instructions, hardware preparation, and installation instructions for the MVME166. Hardware preparation and installation for the MVME712 series transition modules is described in a separate manual. Refer to the Related Documentation section in Chapter 1. Unpacking Instructions If the shipping carton is damaged upon receipt, request carrier’s agent be present during unpacking and inspection...

  • Page 38: Scsi Terminator Enable Header J2

    Hardware Preparation and Installation Figure 2-1 illustrates the placement of the switches, jumper headers, connectors, and LED indicators on the MVME166. The MVME166 has been factory tested and is shipped with the factory jumper settings described in the following sections. The MVME166 operates with its required and factory- installed Debug Monitor, MVME166Bug (166Bug), with these factory jumper settings.
  • Page 39 MVME 166 LGA FAIL STAT RUN SCON LAN RPWR SCSI VME TPWR VSB ABORT RESET Figure 2-1. MVME166 Switches, Headers, Connectors, Fuses, and LEDs MVME166IG/D2 Hardware Preparation...

  • Page 40: General Purpose Readable Jumpers On Header J3

    Hardware Preparation and Installation General Purpose Readable Jumpers on Header J3 Each MVME166 may be configured with readable jumpers. These jumpers can be read as a register (at $FFF40088) in the VMEchip2 LCSR. The bit values are read as a one when the jumper is off, and as a zero when the jumper is on. System Controller Header J6 The MVME166 can operate as VMEbus system controller.

  • Page 41: Sram Backup Power Source Select Header J7

    If the battery is removed, jumpers must be installed on J7, between pins 1 to 3 and pins 2 to 4, as shown in the Factory Configuration drawing above. MVME166IG/D2 Hardware Preparation Primary Source VMEbus +5V STBY Secondary Source VMEbus +5V STBY...

  • Page 42: Installation Instructions

    Hardware Preparation and Installation Installation Instructions The following sections discuss the installation of the MVME166 in a VME chassis, and describe system considerations relevant to the installation. Ensure that an EPROM device is installed as needed. The factory configuration provides for one EPROM (installed for 166BBug, the BootBug firmware subset of the MVME166Bug debug monitor contained in Flash memory) in socket U12.
  • Page 43 Board Computers Programmer’s Reference Guide.) Some cables you require may not be provided with the MVME712 series modules; you may need to fabricate or otherwise provide those cables. (Motorola recommends using shielded cables for all connections to peripherals to minimize radiation.) Connect the peripherals to the cable(s).

  • Page 44: System Considerations

    Hardware Preparation and Installation h. Replace the chassis cover. Connect the power cable to the ac power source and turn the equipment power ON. System Considerations The MVME166 draws power from both the P1 and P2 connectors on the VMEbus backplane. P2 is also used for the upper 16 bits of data for 32-bit transfers, and for the upper 8 address lines for extended addressing mode.
  • Page 45 MVME712-07 module, the TPWR LED lights when there is SCSI terminator power. Because any device on the SCSI bus can provide TERMPWR, the LED does not directly indicate the condition of the fuse. If the LED is not illuminated during SCSI bus operation, the fuse should be checked. MVME166IG/D2...
  • Page 46 Hardware Preparation and Installation 2-10 MVME166 Single Board Computer Installation Guide...

  • Page 47: Debugger General Information

    The firmware for the M68000-based (68K) series of board and system level products has a common genealogy, deriving from the BUG firmware currently used on all Motorola M68000-based CPU modules. The M68000 firmware family provides a high degree of functionality and user friendliness, and yet stresses portability and ease of maintenance.
  • Page 48 (e.g., "GO"), then control may or may not return to 166Bug, depending on the outcome of the user program. If you have used one or more of Motorola’s other debugging packages, you will find the CISC 166Bug very similar. Some effort has also been made to make the interactive commands more consistent.

  • Page 49: 166Bug Implementation

    RAM, combine your application with the 166Bug image, and then reprogram Flash with the combined object image. Installation and Startup Even though the MVME166Bug firmware is installed on the MVME166 module, for 166Bug to operate properly with the MVME166, follow this set-up procedure. MVME166IG/D2 166Bug Implementation...
  • Page 50 Debugger General Information Inserting or removing modules while power is applied aution could damage module components. Turn all equipment power OFF. Refer to the Hardware Preparation section in Chapter 2 and install/remove jumpers on headers as required for your particular application. Jumpers on header J3 affect 166Bug operation as listed below.
  • Page 51 166Bug run in Board mode. Refer to Appendix A. Configure header J6 by installing/removing a jumper between pins 1 and 2. A jumper installed/removed enables/disables the system controller function of the MVME166. MVME166IG/D2 Installation and Startup Description When this bit is a one (high), it instructs the debugger to use local Static RAM for its work page (i.e.,...
  • Page 52 Debugger General Information Refer to the set-up procedure for your particular chassis or system for details concerning the installation of the MVME166. Connect the terminal which is to be used as the 166Bug system console to the default debug EIA-232-D port at serial port 1 on front panel I/O connector J9 through an MVME712-10 or MVME712-06 transition module.

  • Page 53: Bootbug

    SETUP Detailed descriptions of additional subset commands can be found in the Debugging Package for Motorola 68K CISC CPUs User’s Manual. There is a jumper on the MVME166 board that controls the operation of the BootBug. If the jumper at J3 pins 7 and 8 is in place (GPI3), then the BootBug (which always executes at reset and powerup) will unconditionally jump to the debugger product contained in the Flash memory.

  • Page 54: Execute User Program

    Debugger General Information Execute User Program EXEC [ADDR] The EXEC command is used to initiate target code execution. The specified address ("ADDR") is placed in the target Program Counter (PC). Execution will start at the target PC address. Setup System Parameters SETUP Setup allows configuring certain parameters that are necessary for some I/O operations (SCSI, VME, and Ethernet).

  • Page 55: Autoboot

    If, however, the MVME166 loses power but the controller does not, and the tape happens to be at load point, the sequences of commands required (attach and rewind) cannot be given to the controller and autoboot will not be successful. MVME166IG/D2 Autoboot...

  • Page 56: Romboot

    For complete details on how to use ROMboot, refer to the Debugging Package for Motorola 68K CISC CPUs User’s Manual. Network Boot Network Auto Boot is a software routine contained in the 166Bug EPROMs that provides a mechanism for booting an operating system using a network (local Ethernet interface) as the boot device.

  • Page 57: Restarting The System

    MVME166 had just been powered up. All static variables (including disk device and controller parameters) are restored to their default states. The breakpoint table and offset registers are cleared. The target MVME166IG/D2 Restarting the System 3-11...

  • Page 58: Abort

    Debugger General Information registers are invalidated. Input and output character queues are cleared. Onboard devices (timer, serial ports, etc.) are reset, and the first two serial ports are reconfigured to their default state. During WARM reset, the 166Bug variables and tables are preserved, as well as the target state registers and breakpoints.

  • Page 59: Mpu Clock Speed Calculation

    Interrupt Stack Pointer (ISP) set to the top of the user space. At power up or reset, all 8KB of memory at addresses $FFE0C000 through $FFE0DFFF is completely changed by the 166Bug initial stack. MVME166IG/D2 Memory Requirements 3-13...

  • Page 60: Terminal Input/Output Control

    Debugger General Information Terminal Input/Output Control When entering a command at the prompt, the following control codes may be entered for limited command line editing. The presence of the caret ( ^ ) before a character indicates that the Control (CTRL) key must be held down while striking the character key.

  • Page 61: Disk I/O Support

    166Bug translates this into an equivalent sector specification, which is then passed on to the controller to initiate the transfer. If the conversion from blocks to sectors yields a fractional sector count, an error is returned and no data is transferred. MVME166IG/D2 Disk I/O Support 3-15...

  • Page 62: Device Probe Function

    Disk I/O via 166Bug Commands These following 166Bug commands are provided for disk I/O. Detailed instructions for their use are found in the Debugging Package for Motorola 68K CISC CPUs User’s Manual. When a command is issued to a particular controller LUN and device LUN, these LUNs are remembered by 166Bug so that the next disk command defaults to use the same controller and device.

  • Page 63: Ioc (I/O Control)

    Disk control. This function is used to implement any special device control functions that cannot be accommodated easily with any of the other disk functions. Refer to the Debugging Package for Motorola 68K CISC CPUs User’s Manual for information on using these and other system calls. MVME166IG/D2...

  • Page 64: Default 166Bug Controller And Device Parameters

    Refer to the system call descriptions in the Debugging Package for Motorola 68K CISC CPUs User’s Manual for details on the format and construction of these standardized "user" packets.

  • Page 65: Disk I/O Error Codes

    Datagram Protocol, or UDP) from sources to destinations, where sources and destinations are hosts identified by fixed length addresses. The UDP/IP protocols are necessary for the TFTP and BOOTP protocols; TFTP and BOOTP require a UDP/IP connection. MVME166IG/D2 Network I/O Support 3-19...

  • Page 66: Rarp/Arp Protocol Modules

    Debugger General Information RARP/ARP Protocol Modules The Reverse Address Resolution Protocol (RARP) basically consists of an identity-less node broadcasting a "whoami" packet onto the Ethernet, and waiting for an answer. The RARP server fills an Ethernet reply packet up with the target’s Internet Address and sends it.

  • Page 67: Multiprocessor Support

    (HEX 52) -- You can only program Flash memory by the MPCR method. Refer to the .PFLASH system call in the Debugging Package for Motorola 68K CISC CPUs User’s Manual for a description of the Flash memory program control packet structure.
  • Page 68 Debugger General Information The Multiprocessor Address Register (MPAR), located in shared RAM location of $804 offset from the base address the debugger loads it at, contains the second of two longwords used to control communication between processors. The MPAR contents specify the address at which execution for the remote processor is to begin if the MPCR contains a G or B.

  • Page 69: Gcsr Method

    User’s Manual for complete descriptions of the diagnostic routines available and instructions on how to invoke them. Note that some diagnostics depend on restart defaults that are set up only in a particular restart mode. The documentation for such diagnostics includes restart information. MVME166IG/D2 GPCSR0 GPCSR1 Diagnostic Facilities 3-23...
  • Page 70 Debugger General Information 3-24 MVME166 Single Board Computer Installation Guide...

  • Page 71: Using The 166Bug Debugger

    Entering Debugger Command Lines 166Bug is command-driven and performs its various operations in response to user commands entered at the keyboard. When the debugger prompt ) appears on the terminal screen, then the debugger is ready to 166-Bug> accept commands. As the command line is entered, it is stored in an internal buffer.

  • Page 72: Syntactic Variables

    Using the 166Bug Debugger The commands are shown using a modified Backus-Naur form syntax. The metasymbols used are: boldface strings italic strings Syntactic Variables The following syntactic variables are encountered in the command descriptions which follow. In addition, other syntactic variables may be used and are defined in the particular command description in which they occur.

  • Page 73: Expression As A Parameter

    Evaluation of an expression is always from left to right unless parentheses are used to group part of the expression. There is no operator precedence. Subexpressions within parentheses are evaluated first. Nested parenthetical subexpressions are evaluated from the inside out. MVME166IG/D2 Entering Debugger Command Lines Base Identifier...

  • Page 74: Address As A Parameter

    Using the 166Bug Debugger Valid expression examples: Expression FF0011 45+99 &45+&99 @35+@67+@10 %10011110+%1001 88<<4 AA&F0 The total value of the expression must be between 0 and $FFFFFFFF. Address as a Parameter Many commands use ADDR as a parameter. The syntax accepted by 166Bug is similar to the one accepted by the MC68040 one-line assembler.

  • Page 75: Table 4-1. Debugger Address Parameter Formats

    — Displacement (any valid expression). — Base displacement (any valid expression). — Outer displacement (any valid expression). — Register number (0 to 7). — Offset register n. MVME166IG/D2 Entering Debugger Command Lines Example Description Absolute address+contents of automatic offset register.

  • Page 76: Offset Registers

    Using the 166Bug Debugger In commands with RANGE specified as ADDR DEL ADDR, and with size option W or L chosen, data at the second (ending) address is acted on only if the second address is a proper boundary for a word or longword, respectively. Offset Registers Eight pseudo-registers (R0 through R7) called offset registers are used to simplify the debugging of relocatable and position-independent modules.
  • Page 77 The disassembled code is shown next: MD 1327C;DI 166Bug> 0001327C 48E78080 00013280 4280 00013282 1018 00013284 5340 00013286 12D8 00013288 51C8FFFC 0001328C 4CDF0101 00013290 4E75 166Bug> MVME166IG/D2 Entering Debugger Command Lines * MOVE STRING SUBROUTINE MOVESTR MOVEM.L CLR.L MOVE.B SUBQ.W LOOP MOVE.B MOVS DBRA MOVEM.L...

  • Page 78: Port Numbers

    00014+R0 4E75 166Bug> For additional information about the offset registers, refer to the Debugging Package for Motorola 68K CISC CPUs User’s Manual. Port Numbers Some 166Bug commands give you the option to choose the port to be used to input or output. Valid port numbers which may be used for these commands...

  • Page 79: Entering And Debugging Programs

    You can access various 166Bug routines via one of the MC68040 TRAP instructions, using vector #15. Refer to the Debugging Package for Motorola 68K CISC CPUs User’s Manual for details on the various TRAP #15 utilities available and how to invoke them from within a user program.

  • Page 80: 166Bug Vector Table And Workspace

    Using the 166Bug Debugger If your application enables translation through the Memory Management Units (MMUs), and if your application utilizes resources of the debugger (e.g., system calls), your application must create the necessary translation tables for the debugger to have access to its various resources. The debugger honors the enabling of the MMUs;...

  • Page 81: Exception Vectors Used By 166Bug

    In this way, the operation of the debugger facility (through an exception) is transparent to users. MVME166IG/D2 Preserving the Debugger Operating Environment 166Bug Facility Breakpoints (used by...

  • Page 82: Using 166Bug Target Vector Table

    Using the 166Bug Debugger Example: Trace one instruction using debugger. 166Bug> =00010000 SR =0000DFFC MSP =0=F0 =00000000 D1 =00000000 D5 =00000000 A1 =00000000 A5 00010000 203C0000 0001 166Bug> =00010006 SR =0000DFFC MSP =0=F0 =00000001 D1 =00000000 D5 =00000000 A1 =00000000 A5 00010006 D280 166Bug>...

  • Page 83: Creating A New Vector Table

    This provides diagnostic support in the event that your program is stopped by an unexpected exception. The generalized exception handler gives a formatted display of the target registers and identifies the type of the exception. MVME166IG/D2 Preserving the Debugger Operating Environment 4-13...
  • Page 84 Using the 166Bug Debugger The following is an example of a routine which builds a separate vector table and then moves the VBR to point at it: BUILDX - Build exception vector table **** BUILDX MOVEC.L MOVE.L MOVE.W LOOP MOVE.L SUBQ.W BNE.B MOVE.L...

  • Page 85: 166Bug Generalized Exception Handler

    Example: Bus error at address $F00000. It is assumed for this example that an access of memory location $F00000 initiates bus error exception processing. MVME166IG/D2 Preserving the Debugger Operating Environment **** Save space in stack for a PC value. Frame pointer for accessing PC space.
  • Page 86 Using the 166Bug Debugger 166Bug> =00010000 SR =0000DFFC MSP =0=F0 =00000001 D1 =00000000 D5 =00000000 A1 =00000000 A5 00010000 203900F0 0000 166Bug> Exception: Access Fault (Local Off Board) PC =FF839154 SR =2704 Format/Vector =7008 SSW =0145 Fault Address =00F00000 Effective Address =0000D4E8 =00010000 SR =0000DFFC MSP =0=F0...

  • Page 87: Floating Point Support

    (any unspecified digits in the mantissa field are set to zero). Each field must be separated from adjacent fields by an underscore. All the digit positions in the sign and exponent fields must be present. MVME166IG/D2 Integer Data Types Byte Word...

  • Page 88: Single Precision Real

    Using the 166Bug Debugger Single Precision Real This format would appear in memory as: 1-bit sign field 8-bit biased exponent field 23-bit fraction field A single precision number takes 4 bytes in memory. Double Precision Real This format would appear in memory as: 1-bit sign field 11-bit biased exponent field 52-bit fraction field...

  • Page 89: Packed Decimal Real

    An optional Exponent sign (+, -). From 1 to 3 decimal digits. For more information about the MC68040 floating point unit, refer to the M68040 Microprocessor User’s Manual. MVME166IG/D2 Floating Point Support (4 binary digits) (4 hex digits) (17 hex digits)

  • Page 90: The 166Bug Debugger Command Set

    Using the 166Bug Debugger The 166Bug Debugger Command Set The 166Bug debugger commands are summarized in Table 4-3. The command syntax is shown using the symbols explained earlier in this chapter. The CNFG and ENV commands are explained in Appendix A. Controllers, devices, and their LUNs are listed in Appendix B or Appendix C.
  • Page 91 NIOP Network I/O Physical NIOT Network I/O Teach NPING Network Ping Offset Registers Display/Modify Printer Attach NOPA Printer Detach MVME166IG/D2 The 166Bug Debugger Command Set Command Line Syntax GO [ADDR] GT ADDR HE [COMMAND] IOI [;[C|L]] IOT [;[A][F][H][T]] IRQM [MASK] LO [n] [ADDR] [;X|C|T] [=text]...
  • Page 92 Using the 166Bug Debugger Table 4-3. Debugger Commands (Continued) Command Mnemonic Port Format NOPF Port Detach PFLASH Program FLASH Memory Put RTC Into Power Save Mode for Storage ROMboot Enable NORB ROMboot Disable Register Display REMOTE Connect the Remote Modem to RESET Cold/Warm Reset Read Loop...

  • Page 93: Configure Board Information Block

    ENVIRONMENT COMMANDS Configure Board Information Block CNFG [;[I][M]] This command is used to display and configure the board information block. This block is resident within the Non-Volatile RAM (NVRAM). Refer to the MVME166 Single Board Computer User’s Manual for the actual location. The information block contains various elements detailing specific operation parameters of the hardware.

  • Page 94: Set Environment To Bug/Operating System

    Configure and Environment Commands Using the I option initializes the unused area of the board information block to zero. Modification is permitted by using the M option of the command. At the end of the modification session, you are prompted for the update to Non-Volatile RAM (NVRAM).

  • Page 95: Table A-1. Env Command Parameters

    Ignore CFGA Block on a Hard Disk Boot [Y/N] Auto Boot Enable [Y/N] Auto Boot at power-up only [Y/N] Auto Boot Controller LUN Auto Boot Device LUN Auto Boot Abort Delay MVME166IG/D2 Set Environment to Bug/Operating System Default Meaning of Default System mode Display field service menu.
  • Page 96 Configure and Environment Commands Table A-1. ENV Command Parameters (Continued) ENV Parameter and Options Auto Boot Default String [Y(NULL String)/(String)] ROM Boot Enable [Y/N] ROM Boot at power-up only [Y/N] ROM Boot Enable search of VMEbus [Y/N] ROM Boot Abort Delay ROM Boot Direct Starting Address ROM Boot Direct Ending Address Network Auto Boot Enable [Y/N]...
  • Page 97 ENV Parameter and Options Network Autoboot Configuration Parameters Pointer (NVRAM) Memory Search Starting Address Memory Search Ending Address Memory Search Increment Size MVME166IG/D2 Set Environment to Bug/Operating System Default Meaning of Default 00000000 This is the address where the network interface configuration parameters are to be saved/retained in NVRAM;...
  • Page 98 Configure and Environment Commands Table A-1. ENV Command Parameters (Continued) ENV Parameter and Options Memory Search Delay Enable [Y/N] Memory Search Delay Address Memory Size Enable [Y/N] Memory Size Starting Address Memory Size Ending Address Base Address of Local Memory Default Meaning of Default There will be no delay before the...
  • Page 99 Slave Starting Address #1 Slave Ending Address #1 Slave Address Translation Address #1 Slave Address Translation Select #1 Slave Control #1 Slave Enable #2 [Y/N] MVME166IG/D2 Set Environment to Bug/Operating System Default Meaning of Default 02000000 You are prompted twice, once...
  • Page 100 Configure and Environment Commands Table A-1. ENV Command Parameters (Continued) ENV Parameter and Options Slave Starting Address #2 Slave Ending Address #2 Slave Address Translation Address #2 Slave Address Translation Select #2 Slave Control #2 Master Enable #1 [Y/N] Master Starting Address #1 Master Ending Address #1 Master Control #1 Master Enable #2 [Y/N]...
  • Page 101 Master Starting Address #3 Master Ending Address #3 Master Control #3 Master Enable #4 [Y/N] Master Starting Address #4 Master Ending Address #4 MVME166IG/D2 Set Environment to Bug/Operating System Default Meaning of Default 00000000 Ending address of the VMEbus resource that is accessible from the local bus.
  • Page 102 Configure and Environment Commands Table A-1. ENV Command Parameters (Continued) ENV Parameter and Options Master Address Translation Address #4 Master Address Translation Select #4 Master Control #4 Short I/O (VMEbus A16) Enable [Y/N] Short I/O (VMEbus A16) Control F-Page (VMEbus A24) Enable [Y/N] F-Page (VMEbus A24) Control ROM Speed Bank A Code ROM Speed Bank B Code...
  • Page 103 VSBC2 Installed [Y/N] VSBC2 Interrupt Vector Base VSBC2 Local Interrupt Vector Base VSBC2 Slave Starting Address #1 VSBC2 Slave Ending Address #1 MVME166IG/D2 Set Environment to Bug/Operating System Default Meaning of Default Specifies the group address ($FFFFXX00) in Short I/O for this board.
  • Page 104 Configure and Environment Commands Table A-1. ENV Command Parameters (Continued) ENV Parameter and Options VSBC2 Slave Address Offset #1 VSBC2 Slave Attributes #1 VSBC2 Slave Starting Address #2 VSBC2 Slave Ending Address #2 VSBC2 Slave Address Offset #2 VSBC2 Slave Attributes #2 A-12 Default Meaning of Default...
  • Page 105 ENV Parameter and Options VSBC2 Requester Control VSBC2 Timer Control Register VSBC2 Master Starting Address #1 VSBC2 Master Ending Address #1 VSBC2 Master Address Offset #1 MVME166IG/D2 Set Environment to Bug/Operating System Default Meaning of Default 01000000 The bits in this register control aspects of the local board’s...
  • Page 106 Configure and Environment Commands Table A-1. ENV Command Parameters (Continued) ENV Parameter and Options VSBC2 Master Attributes #1 VSBC2 Master Starting Address #2 VSBC2 Master Ending Address #2 VSBC2 Master Address Offset #2 VSBC2 Master Attributes #2 VSBC2 Master Starting Address #3 A-14 Default Meaning of Default...
  • Page 107 VSBC2 Master Address Offset #3 VSBC2 Master Attributes #3 VSBC2 Master Starting Address #4 VSBC2 Master Ending Address #4 VSBC2 Master Address Offset #4 MVME166IG/D2 Set Environment to Bug/Operating System Default Meaning of Default 00000000 Ending address of an address range for the local bus to VSB map decoder #3.
  • Page 108 Configure and Environment Commands Table A-1. ENV Command Parameters (Continued) ENV Parameter and Options VSBC2 Master Attributes #4 A-16 Default Meaning of Default 0030 The bits in this register control various aspects of how the local bus to VSB map decoder #4 will operate.

  • Page 109: Disk/Tape Controller Modules Supported

    DISK/TAPE CONTROLLER Disk/Tape Controller Modules Supported The following VMEbus disk/tape controller modules are supported by the 166Bug. The default address for each controller type is First Address and the controller can be addressed by First CLUN during commands BH, BO, or IOP, or during TRAP #15 calls .DSKRD or .DSKWR.

  • Page 110: Disk/Tape Controller Default Configurations

    Disk/Tape Controller Data Disk/Tape Controller Default Configurations NOTE: SCSI Common Command Set (CCS) devices are only the ones tested by Motorola Computer Group. CISC Single Board Computers -- 7 Devices Controller LUN Address $XXXXXXXX MVME320 -- 4 Devices Controller LUN...
  • Page 111 Controller LUN Address $FFFFA000 $FFFFA200 MVME327A -- 9 Devices Controller LUN Address $FFFFA600 $FFFFA700 MVME166IG/D2 Disk/Tape Controller Default Configurations Device LUN Device Type ESDI Winchester hard drive ESDI Winchester hard drive ESDI Winchester hard drive ESDI Winchester hard drive Device LUN...
  • Page 112 Disk/Tape Controller Data MVME328 -- 14 Devices Controller LUN Address $FFFF9000 $FFFF9800 $FFFF4800 $FFFF5800 $FFFF7000 $FFFF7800 MVME350 -- 1 Device Controller LUN Address $FFFF5000 $FFFF5100 Device LUN Device Type SCSI Common Command Set (CCS), which may be any of these: - Removable flexible direct access (TEAC style) - CD-ROM...

  • Page 113: Iot Command Parameters For Supported Floppy Types

    Number of Bytes in Decimal 653312 Media Size/Density 5.25/DD NOTES: 1. All numerical parameters are in hexadecimal unless otherwise noted. 2. The DSDD5 type floppy is the default setting for the debugger. MVME166IG/D2 Floppy Types and Formats PCXT8 PCXT9 PCXT9_3 PCAT 0280...
  • Page 114 Disk/Tape Controller Data MVME166 Single Board Computer Installation Guide...

  • Page 115: Network Controller Modules Supported

    NETWORK CONTROLLER Network Controller Modules Supported The following VMEbus network controller modules are supported by the MVME166Bug. The default address for each type and position is showed to indicate where the controller must reside to be supported by the MVME166Bug. The controllers are accessed via the specified CLUN and DLUNs listed here.
  • Page 116 Network Controller Data MVME166 Single Board Computer Installation Guide...
  • Page 117 When using this index, keep in mind that a page number indicates only where referenced material begins. It may extend to the page or pages following the page referenced. Numerics 166BBug (see BootBug) 1-10, 2-6 166BBug implementation 3-7 166Bug (see debug monitor MVME166Bug) 4-1...
  • Page 118 CISC Single Board Computer(s) (SBC) Clear To Send (CTS) 3-6 CLUN (controller LUN) B-2, C-1 command identifier 4-1 command line 4-1 configuration, default disk/tape control- ler B-2 configuration, hardware 3-4 Configure (CNFG) and Environment (ENV) commands A-1 Configure Board Information Block (CN- FG) A-1 connector J9 4-8 connectors 1-17...
  • Page 119 2-1 hardware preparation and installation headers 3-4 hexadecimal character 1-6 host port 4-8 host system 4-9 I/O interfaces 1-13 MVME166IG/D2 IACK (interrupt acknowledge) 2-7 indicators 1-9 installation 3-3 installation and startup 3-3 installation instructions 2-6 Intel 82596 LAN Coprocessor Ethernet...
  • Page 120 mantissa field 4-17 manual terminology 1-6 MC68040 MPU 1-10 MC68040 TRAP instructions 4-9 MC68230 Parallel Interface/Timer (PIT) 1-14 memory maps 1-18 local bus 1-18 local I/O devices 1-20 VMEbus 1-22 VMEbus short I/O 1-22 VSB 1-22 memory requirements 3-13 metasymbols 4-2 MK48T08 (see Battery Backed Up RAM, BBRAM, and NVRAM) 1-13 MPAR (Multiprocessor Address Regis-...
  • Page 121 SCSI terminator power 2-9 sequential access device B-2, B-4 Serial Controller Chip (SCC) CD2401) 1-13 MVME166IG/D2 serial port 1 4-8 serial port 2 4-8 serial port interface 1-13 Set Environment to Bug/Operating Sys- tem (ENV) A-2 Setup System Parameters (SETUP) 3-8...
  • Page 122 TFTP protocol module 3-20 tick timers 1-16 timeout 1-17 transfer type (TT) 1-18 TRAP #15 4-9 true 1-7 TT (transfer type) 1-18 TTL 1-14 two-byte 1-7 UDP/IP protocol modules 3-19 unpacking instructions 2-1 using 166Bug target vector table 4-12 using the 166Bug debugger 4-1 V.35 1-14 vector table 4-10 vertical bar 4-2...

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