Ecc Control Register - Motorola MVME5100 Programmer's Reference Manual

ECC Control Register

Address
Bit
Name
Operation
Reset
refdis
rwcb
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$FEF80028
When set, refdis causes the refresher and all of its
associated counters and state machines to be cleared and
maintained that way until refdis is removed (cleared). If a
refresh cycle is in process when refdis is updated by a
write to this register, the update does not take effect until
the refresh cycle has completed. This prevents the
generation of illegal cycles to the SDRAM when refdis is
updated.
rwcb, when set, causes reads and writes to SDRAM from
the PPC60x bus to access check-bit data rather than
normal data. The data path used for reading and writing
check bits is D0-D7. Each 8-bit check-bit location
services 64 bits of normal data.
relationship between normal data and check-bit data.
Programming Model
READ ZERO
Figure 3-10 shows the
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