Ppc Address Mapping; Figure 2-2. Ppc To Pci Address Decoding - Motorola MVME5100 Programmer's Reference Manual

Hawk PCI Host Bridge & Multi-Processor Interrupt Controller

PPC Address Mapping

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2-6
The PHB will map either PCI memory space or PCI I/O space into PPC
address space using four programmable map decoders. These decoders
provide windows into the PCI bus from the PPC bus. The most significant
16 bits of the PPC address are compared with the address range of each
map decoder, and if the address falls within the specified range, the access
is passed on to the PCI. An example of this is shown in
PPC Bus Address
Decode is
XSADDx Register

Figure 2-2. PPC to PCI Address Decoding

There are no limits imposed by the PHB on how large of an address space
a map decoder can represent. There is a lower limit of a minimum of 64
KBytes due to the resolution of the address compare logic.
For each map, there is an associated set of attributes. These attributes are
used to enable read accesses, enable write accesses, enable write posting,
and define the PCI transfer characteristics.
8 0 8 0 1 2 3 4
0 15 16
>= and <=
7 0 8 0 9 0 0 0
0 15 16
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Figure 2-2.
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