Motorola MVME5100 Programmer's Reference Manual page 17

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Figure 1-1. MVME5100 Block Diagram ...................................................................1-3
Figure 2-1. Hawk PCI Host Bridge Block Diagram ..................................................2-3
Figure 2-2. PPC to PCI Address Decoding................................................................2-6
Figure 2-3. PPC to PCI Address Translation .............................................................2-7
Figure 2-4. PCI to PPC Address Decoding..............................................................2-20
Figure 2-5. PCI to PPC Address Translation ...........................................................2-21
Figure 2-6. PCI Spread I/O Address Translation .....................................................2-31
Figure 2-7. Big-to-Little-Endian Data Swap ...........................................................2-39
Figure 2-8. Serial Mode Interrupt Scan ...................................................................2-51
Figure 2-9. MPIC Block Diagram ...........................................................................2-57
Figure 3-3. Overall SDRAM Connections.................................................................3-4
Figure 3-6. Programming Sequence for I
Figure 3-7. Programming Sequence for I
Figure 3-8. Programming Sequence for I
Figure 3-9. Programming Sequence for I
Figure 3-10. Read/Write Check-bit Data Paths........................................................3-46
Figure 4-1. Big-Endian Mode ....................................................................................4-6
Figure 4-2. Little-Endian Mode .................................................................................4-7
List of Figures
2
C Byte Write..........................................3-24
2
C Random Read ....................................3-26
2
C Current Address Read........................3-28
2
C Page Write..........................................3-30
2
C Sequential Read .................................3-33
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