Motorola MVME5100 Programmer's Reference Manual page 84

The PCI Slave and the PPC Slave contribute to this mechanism in the
following manner. Each slave function will issue a stall signal to the PCI
Master anytime it is currently processing a transaction that must have
control of the opposing bus before the transaction can be completed. The
events that activate this signal are:
A simultaneous indication of a stall from both slaves means that a bridge
lock has happened. To resolve this, one of the slaves must back out of its
currently pending transaction. This will allow the other stalled slave to
proceed with its transaction. When the PCI Master detects bridge lock, it
will always signal the PPC Slave to take actions to resolve the bridge lock.
If the PPC bus is currently supporting a read cycle of any type, the PPC
Slave will terminate the pending cycle with a retry. Note that if the read
cycle is across a mod-4 address boundary (i.e. from address 0x...02, 3
bytes), it is possible that a portion of the read could have been completed
before the stall condition was detected. The previously read data will be
discarded and the current transaction will be retried.
If the PPC bus is currently supporting a posted write transaction, the
transaction will be allowed to complete since this type of transaction is
guaranteed completion. If the PPC bus is currently supporting a non-
posted write transaction, the transaction will be terminated with a retry.
Note that a mod-4 non-posted write transaction could be interrupted
between write cycles, and thereby results in a partially completed write
cycle. It is recommended that write cycles to write-sensitive, non-posted
locations be performed on mod-4 address boundaries.
The PCI Master must make the determination to perform the resolution
function since it must make some decisions on possibly removing a
currently pending command from the PPC FIFO.
There are some performance issues related to bridge lock resolution. PHB
offers two mechanism that allow fine tuning of the bridge lock resolution
function.
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Read cycle with no read data in the FIFO
Non-posted write cycle
Posted write cycle and FIFO full
Functional Description
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