Memory Maps; Processor Memory Map; Pci / Vme Memory Map; System Bus - Motorola MVME5100 Programmer's Reference Manual

Product Data and Memory Maps
1

Memory maps

Processor Memory Map

PCI / VME Memory Map

System Bus

Processors

Processor Type Identification

1-4
The following sections describe the memory maps for the MVME5100.
Following a reset, the memory map presented to the processor is identical
to the CHRP memory map described in the PowerPlus II Engineering
Specification listed in
The MVME5100 is fully capable of supporting both the PREP and the
CHRP processor memory maps with ROM/FLASH size limited to
16MBytes and RAM size limited to 1GB.
Following a reset, the Hawk ASIC disables all PCI slave map decoders. As
stated above, the MVME5100 is fully capable of supporting both the PREP
and the CHRP PCI and VME memory maps.
The following sections describe the processor system bus for the
MVME5100.
The MVME5100 has the BGA foot print that supports the MPC7400
processor. The maximum external processor bus speed is 100 MHz. Parity
checking is supported for the system address and data busses.
The type of the processor can be determined by reading the Processor
Version Register (PVR). The PVR value for the MPC7400 processor is
0x000C0100h.
Appendix A, Related Documentation.
Computer Group Literature Center Web Site