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Explanation
IM 760401-01E
7.2 Setting the Target Element, PLL Source and Harmonic Distortion Method
Setting the Target Element
Only one input element should be set for harmonic measurement. The initial value is
EL1. At the WT210 the element setting menu does not appear.
• EL1: Element 1 is used for measurement;
• EL2: Element 2 is used for measurement; For 760502, this menu is not shown;
• EL3: Element 3 is used for measurement.
Setting the PLL source
For harmonic measurement, it is necessary to select the input to be used as the
fundamental frequency (PLL source) for synchronization (PLL stands for Phase
Locked Loop).
• V1: Sets the voltage of element 1 as the PLL source;
• A1: Sets the current of element 1 as the PLL source;
• V2: Sets the voltage of element 2 as the PLL source;
• A2: Sets the current of element 2 as the PLL source;
• V3: Sets the voltage of element 3 as the PLL source;
• A3: Sets the current of element 3 as the PLL source.
Note
•
If the fundamental frequency of the PLL source cannot be measured due to fluctuations or
distortion, it is not possible to obtain correct measurement results. In this case, it is
suggested that voltage with relatively small distortion be selected as the PLL source.
•
It is recommended to turn ON the frequency filter in cases where the fundamental frequency
is 500 Hz or less and high frequency components are present. The cutoff frequency of this
filter is 500 Hz. The filter is valid only for the PLL source.
•
If the amplitude of the input signal selected as the PLL source is smaller than the rated range
value, PLL synchronization may sometimes fail. In this case, it is suggested that a suitable
measurement range be selected so that the input level exceeds 30% (greater than or equal to
60% if the crest factor is set to 6) of the rated range value.
Setting the Computation Method of Harmonic Distortion
The computation method of harmonic distortion can be selected from the following two.
In the following explanation a maximum of 50 analysis orders is assumed. In case of
a maximum less than 50, computation/display will be performed up to that order.
• iEC: Computes the ratio of the rms value of the 2nd to 50th order component to
that of the fundamental (1st order).
• CSA: Computes the ratio of the rms value of the 2nd to 50th order component to
that of the rms value of the 1st to 50th component.
Computation Equation
In case of iEC
n
/
2
(C
)
C
1
k
k=2
In case of CSA
n
n
/
2
(C
)
(C
)
k
k
k=2
k=1
• C1: Fundamental component (1st order)
• Ck: Fundamental or harmonic component
• k: Analysis order
• n: Maximum order. The maximum order depends on the fundamental frequency
of the input set as the PLL source. Refer to Chapter 16 for more details.
2
7
7-5
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