Figure 3-1. Control Register 4 (Cr4) - AMD K5 Technical Reference Manual

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AMD-K5 Processor Technical Reference Manual
3.1
Control Register 4 (CR4) Extensions
31
Reserved
Global Page Extension
Machine Check Enable
Page Size Extension
Debugging Extensions
Time Stamp Disable
Protected Virtual Interrupts
Virtual-8086 Mode Extensions

Figure 3-1. Control Register 4 (CR4)

3-2
The sections that follow provide details on the architectural
extensions visible to system and application software. Some
sections include pseudo-code algorithms for suggested BIOS
modifications to support the extensions. Architectural exten-
sions visible to debug and test software, such as I/O break-
points, are described in Chapter 7.
Control register 4 contains bits that enable or specify many of
the extensions to the 486 architecture. The majority of the bits
in CR4 are reserved. The default state for all bits in CR4 is all
zeros. Figure 3-1 shows the format of CR4. Table 3-1 describes
the fields in CR4.
GPE
7
MCE
6
PSE
4
DE
3
TSD
2
PVI
1
VME
0
18524C/0—Nov1996
8
7
6
5
4
3
G
M
P
D
P
C
S
E
E
E
E
Software Environment and Extensions
2
1
0
T
P
V
S
V
M
D
I
E

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