Figure 7-5. Test Formats: Instruction-Cache Tags - AMD K5 Technical Reference Manual

AMD-K5 Processor Technical Reference Manual
EDX: Array Pointer
31 30 29 28 27
Way
0 0 0 0 0 0 0 0 0 0
EAX: Test Data
31
0 0 0 0 0 0 0 0 0 0 0 0
(E5h) Linear Tag
31
0 0 0 0 0 0 0 0 0 0 0
(EDh) Physical Tag
31
0 0 0 0 0 0 0 0 0 0 0 0 0
(E6h) Valid Bits
31
0 0 0 0 0 0 0 0 0 0 0 0 0
(E7h) Branch-Prediction Bits

Figure 7-5. Test Formats: Instruction-Cache Tags

7-12
20 19
Set
20 19
21 20
19 18
19 18
12 11 8 7
Array ID
0 0 0 0
(E5h, EDh, E6h, E7h)
Valid Bits
Valid Bits
Valid Bits
Valid Bits
18524C/0—Nov1996
0
0
0
0
0
Test and Debug