Figure 6-7. V; Power-Up Requirements - AMD K5 Technical Reference Manual

AMD-K5 Processor Technical Reference Manual
6.6

Power-Up Requirements

V
CC
PWRGOOD
RESET
CLK

Figure 6-7. V

and CLK
cc
6-40
During power-up, CLK should be toggling and RESET should
be asserted as V
CC
age. Figure 6-7 shows this timing. After V
specification, RESET must be asserted for a minimum of 1 ms
to allow the phase-lock loop to synchronize.
V
CC
≥ 1 ms
is ramping toward normal operating volt-
at Operating Voltage
RESET must be asserted
for at least 1 ms after V
and CLK are stable.
18524C/0—Nov1996
and CLK reach
CC
CC
System Design