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3-6-2 HT Link Control
HT link Width
HT link Frequency
CLMC Support
CDLC
CDLD
CDLW
CDLF
CDIR
CDLR
CDLR Lat
CDLR Len
IH Flow Control Mode
HT link Trislate
Unit ID Clumping
2x LCLK Mode
↑↓→← Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5:Previous Values
3-6-3 PCIE Configuration
Primary Dual Slot Config
>GFX Port 1
>GFX Port 2
>GPP1
>GPP2
>GPP3
>NB-SB Port Features
↑↓→← Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5:Previous Values
3-7
Integrated Peripherals
CIMX-SB700 Revision
Phoenix – AwardBIOS CMOS Setup Utility
HT link Control
Auto
Auto
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
00
23
Auto
Disabled
Disabled
Disabled
F6:Fail-safe Defaults
Phoenix – AwardBIOS CMOS Setup Utility
PCIE Configuration
Press Enter
Press Enter
Press Enter
Press Enter
F6:Fail-safe Defaults
Phoenix – AwardBIOS CMOS Setup Utility
Integrated Peripherals
2.5 0
F7:Optimized Defaults
Auto
press Enter
press Enter
F7:Optimized Defaults
27
Item Help
Menu Level >
Item Help
Menu Level >
Item Help
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