Figure 6-3. Boff Example - AMD K5 Technical Reference Manual

AMD-K5 Processor Technical Reference Manual
AMD-K5
Processor
Look-Aside
L2 Cache

Figure 6-3. BOFF Example

6-16
3. The processor responds with HITM to system logic.
4. System logic asserts BOFF to the requesting master. (HITM
from the processor can be used to generate BOFF.)
5. The other master negates BOFF to the processor so that the
processor can write back its modified line to main memory
and the shared L2 cache.
1 BOFF
EADS
2
HITM
3
5
Writeback
Processor Bus
System
Logic
System Bus
A configuration in which both caching masters were on oppo-
site sides of a shared L2 look-through cache would have some-
what similar operations, except that the L2 cache controller
would do much of the signalling ascribed to system logic in Fig-
ure 6-3.
Other
Caching
Master
BOFF
4
Main
Memory
18524C/0—Nov1996
System Design