Table 4-3. Floating-Point Instructions - AMD K5 Technical Reference Manual

AMD-K5 Processor Technical Reference Manual
Table 4-3. Floating-Point Instructions (continued)
Instruction Mnemonic
FADDP ST(i), ST
FCHS
FCOM ST(i)
FCOM real_32
FCOM real_64
FCOMP ST(i)
FCOMP real_32
FCOMP real_64
FCOMPP
FDECSTP
FIADD int_16
FIADD int_32
4-20
Opcode Format
0_0x_11011110_000_xxx
0_0x_11011001_100_xxx
0_0x_11011x00_010_xxx
0_1x_11011000_010_xxx
0_1x_11011100_010_xxx
0_0x_11011x00_011_xxx
0_1x_11011000_011_xxx
0_1x_11011100_011_xxx
0_0x_11011110_011_xxx
0_0x_11011001_110_xxx
0_1x_11011110_000_xxx
0_1x_11011010_000_xxx
18524C/0—Nov1996
Fastpath or Execution
Microcoded Unit Timing
fpfill
F
fadd
fpfill
F
fchs
fpfill
F
fcmpst 1/2/4
ld
F fpfill
fmv
ld
ld
M
fpfill
fadd
fpfill
F fmv
alu
ld
F fpfill
fmv
ld
ld
M
fpfill
fadd
fpfill
F fmv
nop
alu
M
alu
ld
fpfill
M fadd
fpfill
fadd
ld
fpfill
M fadd
fpfill
fadd
Performance
1/2/5
1/2/5
1/2/4
1/2/4
1/2/4
1/1
1/3/5
1/3/5
1/1
1/2
1/4/6
1/4/6
1/2/4
1/2/4
1/1
1/1
1/3/5
1/3/5
1/1
1/2
1/4/6
1/4/6
1/2/4
1/2/4
1/1/2
1/1/2
1/1/2
1/1
1/3/7
1/3/7
2/7/10
2/7/10
1/1
1/3/7
1/3/7
2/7/10
2/7/10