Performance; Code Optimization; General Superscalar Techniques - AMD K5 Technical Reference Manual

18524C/0—Nov1996
4.1

Code Optimization

4.1.1

General Superscalar Techniques

Code Optimization

Performance

This chapter provides information to assist fast execution and
details on dispatch and execution timing for x86 instructions.
Throughout the chapter, the terms clock and cycle refer to pro-
cessor clock cycles, not bus clock (CLK) cycles.
The code optimization suggestions in this section cover both
general superscalar optimization (that is, techniques common
to both the AMD-K5 and Pentium processors) and techniques
specific to the AMD-K5 processor. In general, all optimization
techniques used for the Pentium processor apply to any wide-
issue x86 processor, but wider-issue designs like the AMD-K5
processor have fewer restrictions.
Short Forms—Use shorter forms of instructions to increase
the effective number of instructions that can be examined
for decoding at any one time. Use 8-bit displacements and
jump offsets where possible.
Simple Instructions—Use simple instructions with hard-
wired decode because they often perform more efficiently.
AMD-K5 Processor Technical Reference Manual
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