Figure 6-5. Write-Once Protocol - AMD K5 Technical Reference Manual

18524C/0—Nov1996

Figure 6-5. Write-Once Protocol

Cache
Line Fill
1
Writethrough
2
Writethrough
3
Main
Memory
AMD-K5 Processor Technical Reference Manual
1
2
AMD-K5
Processor
3
1
Look-Through
L2 Cache 2
System
Logic
System Bus
WB/WT = 0
WB/WT = 0
WB/WT = 1
WB/WT = 0
WB/WT = 1
Other
Bus
Master
6-21