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AMD RX881 Data Book

AMD RX881 Data Book

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AMD RX881 Databook
Technical Reference Manual
Rev 1.40
P/N: 46136_rx881_ds_pub_1.40
© 2011 Advanced Micro Devices Inc

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Summary of Contents for AMD RX881

  • Page 1 AMD RX881 Databook Technical Reference Manual Rev 1.40 P/N: 46136_rx881_ds_pub_1.40 © 2011 Advanced Micro Devices Inc...
  • Page 2 AMD's products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of AMD's product could create a situation where personal injury, death, or severe property or environmental damage may occur.

  • Page 3: Table Of Contents

    ..........................1-4 Chapter 2: Functional Descriptions 2.1 Host Interface ..................................2-1 2.2 Clock Generation ................................2-3 Chapter 3: Pin Descriptions and Strap Options 3.1 RX881 Pin Assignment Top View............................3-2 3.2 Interface Block Diagram ..............................3-4 3.3 CPU HyperTransport™ Interface ............................3-5 3.4 PCI Express® Interfaces ..............................3-5...
  • Page 4 VOH/VOL Tree Activation ..........................7-5 7.4.3 VOH/VOL Pin List.............................. 7-6 Appendix A: Pin Listings A.1 RX881 Pin List Sorted by Ball Reference......................... 1-2 A.2 RX881 Pin List Sorted by Pin Name..........................1-7 Appendix B: Revision History AMD RX881 Databook 1.40 ©...
  • Page 5 Figure 2-2: Host Interface Block Diagram ............................. 2-2 Figure 2-3: RX881 Host Bus Interface Signals ..........................2-3 Figure 3-1: RX881 Pin Assignment Top View (Left) ........................3-2 Figure 3-2: RX881 Pin Assignment Top View (Right) ......................... 3-3 Figure 3-3: RX881 Interface Block Diagram ..........................
  • Page 6 List of Figures This page is left blank intentionally. AMD RX881 Databook 1.40 © 2011 Advanced Micro Devices, Inc. List of Figures-2 Proprietary...

  • Page 7: List Of Tables

    Table 5-4: DC Characteristics for HyperTransport™ and PCI-E Differential Clock (HT_REFCLK, GFX_REFCLK, GPPSB_REFCLK, 100MHz) ................................5-2 Table 5-5: RX881 Thermal Limits ..............................5-3 Table 5-6: RX881 528-Pin FCBGA Package Physical Dimensions ....................5-5 Table 5-7: Recommended Board Solder Reflow Profile - RoHS/Lead-Free Solder ..............5-8 Table 6-1: ACPI States Supported by the RX881 ...........................6-1...
  • Page 8 List of Tables This page intentionally left blank. AMD RX881 Databook 1.40 © 2011 Advanced Micro Devices, Inc. List of Tables-2 Proprietary...

  • Page 9: Chapter 1: Overview

    Robust and Flexible Core Logic Features The RX881 supports a high speed HyperTransport™ interface to the AMD processor, running at a data rate of up to 4.4 GT/s and supporting both HT 1.0 and HT 3.0 protocols. The RX881 is ideally suited for 64-bit operating systems, and ®...

  • Page 10: A-Link Express Ii Interface

    1.2.7 Test Capability Features The RX881 has a variety of test modes and capabilities that provide a very high fault coverage and low DPM (Defect Per Million) ratio: • Full scan implementation on the digital core logic through ATPG (Automatic Test Pattern Generation Vectors).

  • Page 11: Packaging

    (e.g. memory)), system instabilities (e.g. data loss and corrupted images), shortened processor, system component and/or system life and in extreme cases, total system failure. AMD does not provide support or service for issues or damages related to use of an AMD or ATI processor outside of processor specifications or in excess of factory settings.

  • Page 12: Conventions And Notations

    1.5.6 Acronyms and Abbreviations The following is a list of the acronyms and abbreviations used in this manual. 46136 AMD RX881 Databook 1.40 © 2011 Advanced Micro Devices, Inc. Proprietary...

  • Page 13: Table 1-3 Acronyms And Abbreviations

    Joint Test Access Group. An IEEE standard. Mega Byte Peripheral Component Interface PCIe PCI Express Phase Locked Loop POST Power On Self Test Pull-down Resistor Pull-up Resistor SDRAM Synchronous Dynamic RAM Voltage Regulation Module © 2011 Advanced Micro Devices, Inc. 46136 AMD RX881 Databook 1.40 Proprietary...
  • Page 14 Conventions and Notations This page is left blank intentionally. 46136 AMD RX881 Databook 1.40 © 2011 Advanced Micro Devices, Inc. Proprietary...

  • Page 15: Chapter 2: Functional Descriptions

    Chapter 2 Functional Descriptions This chapter describes the functional operation of the major interfaces of the RX881 system logic. Figure 2-1, “RX881 Internal Block Diagram,” illustrates the RX881 internal blocks and interfaces. HyperTransport™ AMD CPU Unit Southbridge Root Complex Graphics...

  • Page 16: Figure 2-2 Host Interface Block Diagram

    The signal name and direction for each signal is shown with respect to the processor. Note that the signal names may be different from those used in the pin listing of the RX881. Detailed descriptions of the signals are given in section 3.3, “CPU HyperTransport™...

  • Page 17: Clock Generation

    HT_RXCADP HT_RXCADN Figure 2-3 RX881 Host Bus Interface Signals Clock Generation The RX881 provides support for an external clock chip to generate PCIe and A-Link Express II clocks. © 2011 Advanced Micro Devices, Inc. 46136 AMD RX881 Databook 1.40 Proprietary...
  • Page 18 Clock Generation This page is left blank intentionally. 46136 AMD RX881 Databook 1.40 © 2011 Advanced Micro Devices, Inc. Proprietary...
  • Page 19 Chapter 3 Pin Descriptions and Strap Options This chapter gives the pin descriptions and the strap options for the RX881. To jump to a topic of interest, use the following list of hyperlinked cross references: “RX881 Pin Assignment Top View” on page 3-2 “Interface Block Diagram”...

  • Page 20: Rx881 Pin Assignment Top View

    RX881 Pin Assignment Top View RX881 Pin Assignment Top View The figures below only represent the relative ball positions. For the actual physical layout of the balls, please refer to Figure 5-2, “RX881 Ball Arrangement (Bottom View),” on page 5- VSSAPCIE GFX_RX1P...

  • Page 21: Figure 3-2 Rx881 Pin Assignment Top View (Right)

    A-Link Express II Interface Clock Interface External graphics Interface General Purpose External Device Interface Power Management Interface Powers Grounds Others Figure 3-2 RX881 Pin Assignment Top View (Right) © 2011 Advanced Micro Devices, Inc. 46136 AMD RX881 Databook 1.40 Proprietary...

  • Page 22: Interface Block Diagram

    Interface Block Diagram Interface Block Diagram Figure 3-3 shows the different interfaces on the RX881. Interface names in blue are hyperlinks to the corresponding sections in this chapter. ® PCIe HT_RXCAD[15:0]P, HT_RXCAD[15:0]N HT_RXCLK[1:0]P, HT_RXCLK[1:0]N GFX_TX[15:0]P, GFX_TX[15:0]N External HyperTransport™ HT_RXCTL[1:0]P, HT_RXCTL[1:0]N...

  • Page 23: Cpu Hypertransport™ Interface

    Note: The widths of the A-Link Express II interface and the general purpose links for external devices are configured through the programmable strap GPPSB_LINK_CONFIG, which is programmed through RX881’s registers. See the RS880 ASIC Family Register Reference Guide, order# 46142, and the RS880 ASIC Family Register Programming Requirements, order# 46141, for details.

  • Page 24: X 1 Lane Interface For General Purpose External Devices

    Note: The widths of the A-Link Express II interface and the general purpose links for external devices are configured through the programmable strap GPPSB_LINK_CONFIG, which is programmed through RX881’s registers. See the RS880 ASIC Family Register Reference Guide, order# 46412, and the RS880 ASIC Family Register Programming Requirements, order# 46141, for details.

  • Page 25: Power Management Pins

    POWERGOOD VDD18 Input from the motherboard signifying that the power to the RX881 is up and ready. Signal High means all power planes are valid. It is not observed internally until it has been high for more than six consecutive REFCLK cycles. The rising edge of this signal is deglitched.

  • Page 26: Power Pins

    These balls are only for maintaining pin-compatibility with earlier VDDLT33 Other – – – generations of AMD IGPs or chipsets. They can either be connected to a 3.3V rail or left unconnected on RX881 systems. Power Pins Table 3-9 Power Pins Pin Name Voltage Ball Reference Pin Description...

  • Page 27: Ground Pins

    Total Ground Pin Count 3.10 Strapping Options The RX881 provides strapping options to define specific operating parameters. The strap values are latched into internal registers after the assertion of the POWERGOOD signal to the RX881. Table 3-11, “Strap Definitions for the RX881,”...
  • Page 28 1: Use default values Note: On the RX881, the widths of the A-Link Express II interface and the general purpose PCIe links are configured through the programmable strap GPPSB_LINK_CONFIG, which is programmed through RX881’s registers. See the RS880 ASIC Family Register Reference Guide, order# 46142, and the RS880 ASIC Family Register Programming Requirements, order# 46141, for details.

  • Page 29: Chapter 4: Timing Specifications

    Duty Cycle Notes: More details are available in AMD HyperTransport 3.0 Reference Clock Specification and AMD Family 10h Processor Reference Clock Parameters, order # 34864. 1 Single-ended measurement at crossing point. Value is maximum-minimum over all time. DC value of common mode is not important due to blocking cap.

  • Page 30: Pci Express® Differential Clock Ac Specifications

    (PLLVDD, IOPLLVDD) 1.1V VDDC Note: There are no specific requirements for the following 1.1V or 1.2V rails: VDDHT, VDDHTRX, VDDHTTX, VDDPCIE Figure 4-1 RX881 Power Rail Power-up Sequence Table 4-3 RX881 Power Rail Power-up Sequence Voltage Difference During Ramping Symbol...

  • Page 31: Chapter 5: Electrical Characteristics And Physical Data

    Output high current at V=VDD33-0.1V** – Note: * Measured with edge rate of 1s at PAD pin. ** For detailed current/voltage characteristics, please refer to the IBIS model. © 2011 Advanced Micro Devices, Inc. 46136 AMD RX881 Databook 1.40 Proprietary...

  • Page 32: Table 5-3 Dc Characteristics For Powergood

    Variation of V over all rising +140 CROSS DELTA CROSS clock edges Ring-back Voltage Margin -100 +100 Absolute Max Input Voltage +1.15 IMAX Absolute Min Input Voltage -0.15 IMIN 46136 AMD RX881 Databook 1.40 © 2011 Advanced Micro Devices, Inc. Proprietary...

  • Page 33: Rx881 Thermal Characteristics

    AMD’s reference heat sink solution for the RX881. Refer to Chapter 6 in the Thermal Design and Analysis Guidelines for the RS880 Product Family, order# 46139 for heatsink and thermal design guidelines.

  • Page 34: Thermal Diode Characteristics

    RX881 Thermal Characteristics 5.2.2 Thermal Diode Characteristics The RX881 has an on-die thermal diode, with its positive and negative terminals connected to the THERMALDIODE_P and THERMALDIODE_N pins respectively. Combined with a thermal sensor circuit, the diode temperature, and hence ...

  • Page 35: Package Information

    Package Information 5.3.1 Physical Dimensions Figure 5-1 Table 5-6 describe the physical dimensions of the RX881 package. Figure 5-2 shows the detailed ball arrangement for the RX881. Mo d- 00 08 5- Rev -0 3 Figure 5-1 RX881 528-Pin FCBGA Package Outline Table 5-6 RX881 528-Pin FCBGA Package Physical Dimensions Ref.

  • Page 36: Pressure Specification

    Package Information Figure 5-2 RX881 Ball Arrangement (Bottom View) 5.3.2 Pressure Specification To avoid damages to the ASIC (die or solder ball joint cracks) caused by improper mechanical assembly of the cooling device, follow the recommendations below: • It is recommended that the maximum load that is evenly applied across the contact area between the thermal management device and the die does not exceed 6 lbf.

  • Page 37: Board Solder Reflow Process Recommendations

    However, for the nine (or eight) pads at each corner of the ASIC package, the size of the openings should not exceed 400µm (see Figure 5-3 below). This recommendation is based on AMD’s sample land pattern design for the RX881, which is available from your AMD CSS representative. 1:1 ratio to pad, or 1:1 ratio to pad, or 400µm max for the eight...

  • Page 38: Figure 5-4 Rohs/Lead-Free Solder (Sac305/405 Tin-Silver-Copper) Reflow Profile

    60 – 80 sec typical 60 – 80 sec typical Pre–heating Zone 120 - 240 sec max Heating Time Heating Time Figure 5-4 RoHS/Lead-Free Solder (SAC305/405 Tin-Silver-Copper) Reflow Profile 46136 AMD RX881 Databook 1.40 © 2011 Advanced Micro Devices, Inc. Proprietary...

  • Page 39: Chapter 6: Power Management And Acpi

    This chapter describes the support for ACPI power management provided by the RX881. The RX881 Northbridge supports ACPI Revision 2.0. The hardware, system BIOS, video BIOS, and drivers of the RX881 have all the logic required for meeting the power management specifications of PC2001, OnNow, and the Windows Logo Program and Device Requirements version 2.1.
  • Page 40 ACPI Power Management Implementation This page is left blank intentionally. 46136 AMD RX881 Databook 1.40 © 2011 Advanced Micro Devices, Inc. Proprietary...

  • Page 41: Test Capability Features

    Test Capability Features The RX881 has integrated test modes and capabilities. These test features cover both the ASIC and board level testing. The ASIC tests provide a very high fault coverage and low DPM (Defect Per Million) ratio of the part. The board level tests modes can be used for motherboard manufacturing and debug purposes.

  • Page 42: Description Of The Rx881 Xor Tree

    XOR Tree Activation The RX881 chip enters the XOR tree test mode by means of the JTAG. First, the 8-bit instruction register of the JTAG is loaded with the XOR instruction (“00001000”). This instruction assigns the input direction to all the pins except pin TDO, which is assigned the output direction to serve as the output of the XOR tree.

  • Page 43: Table 7-3 Rx881 Xor Tree

    XOR Test Table 7-3 RX881 XOR Tree Ball Ball Pin Name Pin Name Reference Reference AD13 HT_RXCAD0P/N Y25/Y24 AD15 HT_RXCAD1P/N V22/V23 AC16 HT_RXCAD2P/N V25/V24 AE13 HT_RXCAD3P/N U24/U25 AC14 HT_RXCAD4P/N T25/T24 HT_RXCAD5P/N P22/P23 AA18 HT_RXCAD6P/N P25/P24 AA20 HT_RXCAD7P/N N24/N25 AA19 HT_RXCAD8P/N...

  • Page 44: Voh/Vol Test

    The VOH/VOL logic gives signal output on I/O’s when test patterns are applied through the TEST_ODD and Figure 7-2 TEST_EVEN inputs. Sample of a generic VOH/VOL tree is shown in 46136 AMD RX881 Databook 1.40 © 2011 Advanced Micro Devices, Inc. Proprietary...

  • Page 45: Voh/Vol Tree Activation

    4. Set NC (ball E8) to 0. 5. Load JTAG instruction register with the instruction 0110 0011. 6. Load JTAG instruction register with the instruction 0010 0111. 7. Set POWERGOOD to 1. © 2011 Advanced Micro Devices, Inc. 46136 AMD RX881 Databook 1.40 Proprietary...

  • Page 46: Voh/Vol Pin List

    VOH/VOL Pin List Table 7-5 shows the RX881 VOH/VOL tree. There is no specific order for connection. Under the Control column, an “ODD” or “EVEN” indicates that the logical output of the pin is same as the “TEST_ODD” or “TEST_EVEN” input respectively.

  • Page 47: Table 7-5 Rx881 Voh/Vol Tree

    VOH/VOL Test Table 7-5 RX881 VOH/VOL Tree Ball Ball Pin Name Control Pin Name Control Reference Reference AE19 HT_TXCAD0P/N D24/D25 Even NC/NC Y17/W18 Even HT_TXCAD1P/N E24/E25 NC/NC AD20/AE21 HT_TXCAD2P/N F24/F25 Even AB18 Even HT_TXCAD3P/N F23/F22 AB13 HT_TXCAD4P/N H23/H22 Even Even...

  • Page 48: Amd Rx881 Databook

    GPP_TX2P/N AA2/AA1 Even GPP_TX3P/N Y1/Y2 GPP_TX4P/N Y4/Y3 Even GPP_TX5P/N V1/V2 SB_TX0P/N AD7/AE7 Even SB_TX1P/N AE6/AD6 SB_TX2P/N AB6/AC6 Even SB_TX3P/N AD5/AE5 GPIO2 Even GPIO4 GPIO3 Even DAC_VSYNC DAC_HSYNC Even 46136 AMD RX881 Databook 1.40 © 2011 Advanced Micro Devices, Inc. Proprietary...

  • Page 49: Appendix A Pin Listings

    Appendix A Pin Listings This appendix contains pin listings for the RX881 sorted in different ways. To go to the listing of interest, use the linked cross-references below: “RX881 Pin List Sorted by Ball Reference” on page A-2 “RX881 Pin List Sorted by Pin Name” on page A-7 ©...

  • Page 50: Rx881 Pin List Sorted By Ball Reference

    Pin Listings RX881 Pin List Sorted by Ball Reference Table A-1 RX881 Pin List Sorted by Ball Reference Ball Ref Pin Name Ball Ref Pin Name Ball Ref Pin Name SB_RX0P PCE_CALRP POWERGOOD VDDA18PCIE GPP_RX2P DAC_HSYNC VSSAPCIE AD10 VDD_MEM PLLVDD...
  • Page 51 GFX_TX4N GPIO4 REFCLK_P AVDD AVSSDI GFX_RX2N LDTSTOP# ALLOW_LDTSTOP VDDHTRX VSSLT VSSAPCIE VSSLT HT_TXCAD9P VSSLT GFX_TX4P HT_TXCAD8N GFX_RX2P VSSLT VSSAHT VSSLT VDDHTRX VSSAHT VSSLT VSSAHT VSSAHT HT_RXCALP HT_TXCAD1P VSSAPCIE © 2011 Advanced Micro Devices, Inc. 46136 AMD RX881 Databook 1.40 Proprietary...
  • Page 52 VDDHT VSSAHT VDDA18PCIE HT_TXCAD11P VSSAHT VDDC HT_TXCAD12N VSSAHT GFX_TX9P VSSAPCIE VDDC HT_TXCAD10P GFX_RX8P VDDC HT_TXCAD10N GFX_RX8N VSSAHT VSSAPCIE VDDHT HT_TXCAD5N GFX_RX9N VDDHTTX HT_TXCAD5P VDDPCIE HT_TXCAD15P VSSAPCIE GFX_TX13P HT_TXCTL1P 46136 AMD RX881 Databook 1.40 © 2011 Advanced Micro Devices, Inc. Proprietary...
  • Page 53 GFX_RX13N GFX_RX13P VSSAPCIE GFX_RX12P VDDPCIE GFX_REFCLKN VDDHTTX GPP_TX3N VDDA18PCIE VSSAHT VDDHTTX VDDC GPP_TX5N VSSAHT HT_RXCAD13N HT_RXCAD11P VDDC HT_RXCAD13P HT_RXCAD11N VDDC HT_RXCAD1P HT_RXCAD0N VDDHT HT_RXCAD1N HT_RXCAD0P VDDHTTX HT_RXCAD2N GPP_TX4N © 2011 Advanced Micro Devices, Inc. 46136 AMD RX881 Databook 1.40 Proprietary...
  • Page 54 Pin Listings Ball Ref Pin Name GPP_TX4P SB_RX3N VSSAPCIE SB_RX1N SB_RX0N VDDA18PCIE 46136 AMD RX881 Databook 1.40 © 2011 Advanced Micro Devices, Inc. Proprietary...

  • Page 55: Rx881 Pin List Sorted By Pin Name

    Pin Listings RX881 Pin List Sorted by Pin Name Table A-2 RX881 Pin List Sorted by Pin Name Pin Name Ball Ref Pin Name Ball Ref Pin Name Ball Ref GFX_RX9N GPP_RX1P ALLOW_LDTSTOP GFX_RX9P GPP_RX2N AVDD GFX_TX0N GPP_RX2P AVDD GFX_TX0P...
  • Page 56 HT_TXCAD10N MEM_VREF AE18 AE19 HT_TXCAD10P AE21 HT_TXCAD11N AE22 HT_TXCAD11P HT_TXCAD12N HT_TXCAD12P HT_TXCAD13N HT_TXCAD13P HT_TXCAD14N HT_TXCAD14P HT_TXCAD15N HT_TXCAD15P AA12 HT_TXCAD1N AA15 HT_TXCAD1P AA17 HT_TXCAD2N AA18 HT_TXCAD2P AA19 HT_TXCAD3N AA20 46136 AMD RX881 Databook 1.40 © 2011 Advanced Micro Devices, Inc. Proprietary...
  • Page 57 VDDA18PCIE VDDHTTX AA21 SB_RX0P VDDA18PCIE VDDHTTX AB22 SB_RX1N VDDA18PCIE VDDHTTX AC23 SB_RX1P VDDA18PCIE VDDHTTX AD24 SB_RX2N VDDA18PCIE VDDHTTX AE25 SB_RX2P VDDA18PCIE VDDHTTX SB_RX3N VDDA18PCIEPLL VDDHTTX SB_RX3P VDDA18PCIEPLL VDDHTTX © 2011 Advanced Micro Devices, Inc. 46136 AMD RX881 Databook 1.40 Proprietary...
  • Page 58 VSSAHT VSSAPCIE AC12 VSSAHT VSSAPCIE AE14 VSSAHT VSSAPCIE AE20 VSSAHT VSSAPCIE VSSAHT VSSAPCIE VSSAHT VSSAPCIE VSSAHT VSSAPCIE VSSAHT VSSAPCIE VSSAHT VSSAPCIE VSSAHT VSSAPCIE VSSAHT VSSAPCIE VSSAHT VSSLT 46136 AMD RX881 Databook 1.40 © 2011 Advanced Micro Devices, Inc. A-10 Proprietary...
  • Page 59 Pin Listings Pin Name Ball Ref VSSLT VSSLT VSSLT VSSLT VSSLT VSSLT VSSLTP18 © 2011 Advanced Micro Devices, Inc. 46136 AMD RX881 Databook 1.40 Proprietary A-11...
  • Page 60 Pin Listings This page is left blank intentionally. 46136 AMD RX881 Databook 1.40 © 2011 Advanced Micro Devices, Inc. A-12 Proprietary...

  • Page 61: Appendix B Revision History

    Appendix B Revision History Rev. 1.30 (Nov 2010) • First release of the public version. Rev. 1.40 (Aug 2011) • Updated Figure 1-1, “RX881 ASIC A11 Production Branding.” © 2011 Advanced Micro Devices, Inc. 46136 AMD RX881 Databook 1.40 Proprietary...
  • Page 62 Revision History This page intentionally left blank. 46136 AMD RX881 Databook 1.40 © 2011 Advanced Micro Devices, Inc. Proprietary...

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