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Testing Performance
To
testthe single-clock, multiple-edge, state acquisition (logic analyzer)
2 Check the data pulse width. Using the oscilloscope, verify that the data pulse width
is 4.000 ns, +0 ps or -100 ps.
a In the oscilloscope Tirnebase menu, select Scale: 1.000 nsIdiv.
b In the oscilloscope Tirnebase menu, select Position. Using the oscilloscope knob,
position the data wavefonn so that the wavefonn
is
centered on the screen.
c
On
the oscilloscope, select [Shift]
+
width: channell, then select [Enter] to display the
data signal pulse width
(+
width(l)).
d
If
the puise width
is
outside the
limits,
adjust the pulse generator channel 2 width until
the puise width
is
within limits.
~
I
DAl A SIGNAL
I
,
1
.,
--+-H-i-!
I
F·~~HJ~~~=rH.H~~H._~
,-~-
Data Pulse Wldth--
,
(LOCK SIGNAL
I
1
I
I
I
1
I
I
I
165SSW11
3-55
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