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Theory of Operation
Pattern Generator tests (Patt Genl
Pattern Generator tests (patt Gen)
The following section contains a description of each of the the pattern generator self tests.
Clock Source Test
The Clock Source Test checks that the internal clock sources are functiorung by verifying the
presence of a given clock source. The test toggles each clock source in the following fashion.
First the board is stopped and outputs are disabled. Module RAM is loaded with zeros, then
the module is placed in the respective mode for the given clock and the clock source is
selected. The module is then started and the main status checked to see that the pipeline is
rurming.
The board will then be stopped and the status checked to see that the pipeline did
stop.
Passing the Clock Source Test implies that the internal clock sources are functioning properly,
and that the other dependent subcircuits respond to the clock signal.
Diagnostic Integer Value: The integer returned will have the following bit format:
81T#:
115,14,13,12
111,10,9,6
17,6,5,4
13,2,1,0
200M
elk
100M
elk
50M
elk
PLD elk
Each nibble of the output corresponds to one of the clock sources. The bit pattern of each
nibble has the following definition:
o
-passed
1 - failed to run
2 - failed to stop
3 - failed to both run and stop
Vector Memory Test
The Vector Memory Test does a first order check of the functionality of RAM. The first pass of
the test will load the entire RAM with OxOOOO. The software will step the clock enough times
to output one page worth of data. At each clock a test read port for each RAM IC will be
checked and verified for all Os.
The second pass of the test will load all the RAMS with OxFFFF and then check using the
same technique as in the first pass, verifying for all Fs.
The third pass loads memory with an alternating Ox5555 and OxAAAA checkerboard pattern.
Again
the test checks the data in the same fashion as in the first pass.
Passing the Vector Memory Test implies that each memory location in RAM can store a logic 1
or O. Passing the test also implies that the CPU interface is functioning and can properly affect
control over the memory and memory addressing.
Diagnostic Integer Value: This test checks the RAM of the entire board. The returned
integer for a particular card has the following format:
81T#:
115, 14
113,12, 11, 10,9,6,7, 6
15, 4, 3, 2, 1, 0
Test 1
Fail row
Failed test
Bits 14,15 contain the test that failed where the value is the following:
1- failed all zeros test
2- failed all ones test
3- failed alternating test
8-23
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