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Testing Performance
To le8lthe single-clock, single-edge, state acquisition (logic analyzer)
Verify the test signal
I Check the clock pulse width. Using the oscilloscope, verify that the clock pulse
width is 3.500 ns, +0 ps or -100 ps.
a Enable the pulse generator channell, channel 2, and trigger outputs (LED off).
b
In
the oscilloscope Timebase menu, select Scale: 1.000 ns/div.
c
In
the oscilloscope Timebase menu, select Position. Using the oscilloscope knob,
position the clock waveform so that the waveform is centered on the screen.
d On the oscilloscope, select [Shift] + width: channel 2, then select [Enter] to display the
clock signal pulse width (+ width(2)).
e If the pulse width
is
outside the limits, adjust the pulse generator channel I width until
the pulse width
is
within limits.
~
:Ij
,
Dill II SIGNAL
,
,
,
I
'~
-j-+--;--+-f-I-+-f-fJ+-t-+-+-+-+-+-f-H-+-1-
1
-
-
1
"
1
-
, I
I
,
,
, j
,
: 1
,
CLOCK SIGNAL
A
-,--\-j-,
!-f-'-H-j-+-...........
-t-j
j-I-I-I-r-+
1 - ' I--'-I-! '_I-+-I_!-4_I_H_!
I--l--+-+-i--l-I-I-I-
~
Clock Pulse Wldtll
I
,
t
,
,
,
16:,~SW01
2 Check the clock period. Using the oscilloscope, verify that the clock period is
10.000 ns, +0 ps or -250 ps.
a
In
the oscilloscope Timebase menu, select Scale: 2.000 ns/div.
b
In
the oscilloscope Timebase menu, select Position. Using the oscilloscope knob,
position the clock waveform so that a rising edge appellIS at the left of the display.
c On the oscilloscope, select [Shift] Period: channel 2, then select [Enter] to display the
clock period (period(2)).
If
the period
is
not less than 10.000 ns, go to step d. If the
period
is
less than 10.000 ns, go to step 3.
d
In
the oscilloscope Timebase menu, increase Position 10.000 ns.
If
the period
is
not
less than 10.000 ns, decrease the pulse generator Period in 10 ps increments until one
of the two periods measured is less than 10.000 ns.
3-29
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