Table of Contents
Advertisement
Testing Performance
To test the multiple-clock, multiple-edge, state acquisition (logic analyzer)
Connect the HP 1662EjES/EP or HP 1663EjES/EP Logic Analyzer to the Pulse Generator
Testing
Combination
Connect to
HP8133A
Channel 2Output
Pod
1,
channel 3
Pod 2, channel3
Pod 3, channel 3
Pod 4, channel3
Connect to
HP 8133A Channel 2
Output
Pod 1, channel 11
Pod 2, channel 11
Pod 3, channel 11
Pod 4, channel 11
Cunnectta
HP 8133A Channell
Output
J-clock
K-clock
L-clock
M-clock
3 Activate the data channels that are connected according to one of the previous
tables.
a Press the Format key.
b Select the field showing the charmel assignments for one of the pods being tested.
Press the Clear entry key. Using the arrow keys, move the selector to the data
charmels to be tested, then press the Select key. An asterisk means that a charmel
is
turned on. When
all
the correct charmels of the pod are turned on, press the Done
key. Follow
this
step for the remaining pods.
··11·
Lab,?
Labl
Ell.
(
Anol~:er
J(
formal
t1ACHWE 1
)
Lab7
LabS
3-41
Advertisement
Table of Contents
