Texas Instruments AFE79 Series Programming & User Manual page 1200

IO Wrap Register Map
2.16.607 Register 10C1h (offset = 10C1h) [reset = 2h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
OVR_SEL_INTPO_
1-1
ALARM_2
OVR_INTPO_ALA
0-0
RM_2
2.16.608 Register 10C4h (offset = 10C4h) [reset = 0h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
POL_INTPO_DAC
0-0
_SYNC_N_AB_0
2.16.609 Register 10C5h (offset = 10C5h) [reset = 2h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
OVR_SEL_INTPO_
1-1 DAC_SYNC_N_AB
_0
OVR_INTPO_DAC
0-0
_SYNC_N_AB_0
1200
Serial Interface Register Maps
Figure 2-2870. Register 10C1h
5 4
Table 2-2886. Register 10C1 Field Descriptions
Type Reset
R/W 1h
R/W 0h
Figure 2-2871. Register 10C4h
5 4
Table 2-2887. Register 10C4 Field Descriptions
Type Reset
R/W 0h
Figure 2-2872. Register 10C5h
5 4
Table 2-2888. Register 10C5 Field Descriptions
Type Reset
R/W 1h
R/W 0h
Copyright © 2020, Texas Instruments Incorporated
3 2
OVR_SEL_INT
PO_ALARM_2
Description
control to select whether the input function intpo_alarm_2
needs to be overriden ot not. 1 indicates override.
override value for intpo_alarm_2 when ovr_sel_intpo_alarm_2
is made high
3 2
Description
polarity control for intpo_dac_sync_n_ab_0. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal
3 2
OVR_SEL_INT
PO_DAC_SYN
Description
control to select whether the input function
intpo_dac_sync_n_ab_0 needs to be overriden ot not. 1
indicates override.
override value for intpo_dac_sync_n_ab_0 when
ovr_sel_intpo_dac_sync_n_ab_0 is made high
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1 0
OVR_INTPO_A
LARM_2
R/W-1h R/W-0h
1 0
POL_INTPO_D
AC_SYNC_N_
AB_0
R/W-0h
1 0
OVR_INTPO_D
AC_SYNC_N_
C_N_AB_0 AB_0
R/W-1h R/W-0h
SBAU337 – May 2020