Texas Instruments AFE79 Series Programming & User Manual page 1163

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2.16.497 Register 904h (offset = 904h) [reset = 0h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
SEL_INTPI_GLOB
2-1
AL_PDN
POL_INTPI_GLOB
0-0
AL_PDN
2.16.498 Register 905h (offset = 905h) [reset = 2h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
OVR_SEL_INTPI_
1-1
GLOBAL_PDN
OVR_INTPI_GLOB
0-0
AL_PDN
2.16.499 Register 908h (offset = 908h) [reset = 0h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
SEL_INTPI_TX_FB
2-1
_LOOP_0
POL_INTPI_TX_FB
0-0
_LOOP_0
SBAU337 – May 2020
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Figure 2-2760. Register 904h
5 4
Table 2-2776. Register 904 Field Descriptions
Type Reset
R/W 0h
R/W 0h
Figure 2-2761. Register 905h
5 4
Table 2-2777. Register 905 Field Descriptions
Type Reset
R/W 1h
R/W 0h
Figure 2-2762. Register 908h
5 4
Table 2-2778. Register 908 Field Descriptions
Type Reset
R/W 0h
R/W 0h
Copyright © 2020, Texas Instruments Incorporated
3 2
SEL_INTPI_GLOBAL_PDN
R/W-0h
Description
select control for intpi_global_pdn. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
polarity control for intpi_global_pdn. 0 indicates pass through
from GPIO when selected 1 indicates inverted signal
3 2
OVR_SEL_INT
PI_GLOBAL_P
Description
control to select whether the input function intpi_global_pdn
needs to be overriden ot not. 1 indicates override.
override value for ovr_sel_intpi_global_pdn is made high
3 2
SEL_INTPI_TX_FB_LOOP_0
R/W-0h
Description
select control for intpi_tx_fb_loop_0. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
polarity control for intpi_tx_fb_loop_0. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal
Serial Interface Register Maps
IO Wrap Register Map
1 0
POL_INTPI_GL
OBAL_PDN
R/W-0h
1 0
OVR_INTPI_G
LOBAL_PDN
DN
R/W-1h R/W-0h
1 0
POL_INTPI_TX
_FB_LOOP_0
R/W-0h
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