Texas Instruments AFE79 Series Programming & User Manual page 1144

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IO Wrap Register Map
2.16.440 Register 84Dh (offset = 84Dh) [reset = 2h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
OVR_SEL_INTPI_
1-1
RXCD_DSA_GAIN
_5
OVR_INTPI_RXCD
0-0
_DSA_GAIN_5
2.16.441 Register 850h (offset = 850h) [reset = 0h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
SEL_INTPI_RXCD
2-1
_DSA_GAINSEL
POL_INTPI_RXCD
0-0
_DSA_GAINSEL
2.16.442 Register 851h (offset = 851h) [reset = 2h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
OVR_SEL_INTPI_
1-1
RXCD_DSA_GAIN
SEL
OVR_INTPI_RXCD
0-0
_DSA_GAINSEL
1144
Serial Interface Register Maps
Figure 2-2703. Register 84Dh
5
4
Table 2-2719. Register 84D Field Descriptions
Type
Reset
R/W
1h
R/W
0h
Figure 2-2704. Register 850h
5
4
Table 2-2720. Register 850 Field Descriptions
Type
Reset
R/W
0h
R/W
0h
Figure 2-2705. Register 851h
5
4
Table 2-2721. Register 851 Field Descriptions
Type
Reset
R/W
1h
R/W
0h
Copyright © 2020, Texas Instruments Incorporated
3
2
OVR_SEL_INT
PI_RXCD_DSA
Description
control to select whether the input function
intpi_rxcd_dsa_gain_5 needs to be overriden ot not. 1
indicates override.
override value for ovr_sel_intpi_rxcd_dsa_gain_5 is made high
3
2
SEL_INTPI_RXCD_DSA_GAINS
EL
R/W-0h
Description
select control for intpi_rxcd_dsa_gainsel. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
polarity control for intpi_rxcd_dsa_gainsel. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal
3
2
OVR_SEL_INT
PI_RXCD_DSA
Description
control to select whether the input function
intpi_rxcd_dsa_gainsel needs to be overriden ot not. 1
indicates override.
override value for ovr_sel_intpi_rxcd_dsa_gainsel is made
high
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1
0
OVR_INTPI_R
XCD_DSA_GAI
_GAIN_5
N_5
R/W-1h
R/W-0h
1
0
POL_INTPI_RX
CD_DSA_GAIN
SEL
R/W-0h
1
0
OVR_INTPI_R
XCD_DSA_GAI
_GAINSEL
NSEL
R/W-1h
R/W-0h
SBAU337 – May 2020

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