Texas Instruments AFE79 Series Programming & User Manual page 1154

IO Wrap Register Map
2.16.470 Register 899h (offset = 899h) [reset = 2h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
OVR_SEL_INTPI_
1-1
SPIB1_CS_N
OVR_INTPI_SPIB1
0-0
_CS_N
2.16.471 Register 89Ch (offset = 89Ch) [reset = 0h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
SEL_INTPI_SPIB1
2-1
_CLK
POL_INTPI_SPIB1
0-0
_CLK
2.16.472 Register 89Dh (offset = 89Dh) [reset = 2h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
OVR_SEL_INTPI_
1-1
SPIB1_CLK
OVR_INTPI_SPIB1
0-0
_CLK
1154
Serial Interface Register Maps
Figure 2-2733. Register 899h
5 4
Table 2-2749. Register 899 Field Descriptions
Type Reset
R/W 1h
R/W 0h
Figure 2-2734. Register 89Ch
5 4
Table 2-2750. Register 89C Field Descriptions
Type Reset
R/W 0h
R/W 0h
Figure 2-2735. Register 89Dh
5 4
Table 2-2751. Register 89D Field Descriptions
Type Reset
R/W 1h
R/W 0h
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3 2
OVR_SEL_INT
PI_SPIB1_CS_
Description
control to select whether the input function intpi_spib1_cs_n
needs to be overriden ot not. 1 indicates override.
override value for ovr_sel_intpi_spib1_cs_n is made high
3 2
SEL_INTPI_SPIB1_CLK
R/W-0h
Description
select control for intpi_spib1_clk. 0 indicates take from parallel
GPIO 1 indicates take from Serial LVDS GPIO 2 indicates
take from Serdes GPIO
polarity control for intpi_spib1_clk. 0 indicates pass through
from GPIO when selected 1 indicates inverted signal
3 2
OVR_SEL_INT
PI_SPIB1_CLK
Description
control to select whether the input function intpi_spib1_clk
needs to be overriden ot not. 1 indicates override.
override value for ovr_sel_intpi_spib1_clk is made high
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1 0
OVR_INTPI_S
PIB1_CS_N
N
R/W-1h R/W-0h
1 0
POL_INTPI_SP
IB1_CLK
R/W-0h
1 0
OVR_INTPI_S
PIB1_CLK
R/W-1h R/W-0h
SBAU337 – May 2020