Texas Instruments AFE79 Series Programming & User Manual page 1171

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2.16.520 Register 9D5h (offset = 9D5h) [reset = 2h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
OVR_SEL_INTPI_
1-1
TDD_EN_RXA
OVR_INTPI_TDD_
0-0
EN_RXA
2.16.521 Register 9D8h (offset = 9D8h) [reset = 0h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
SEL_INTPI_TDD_
2-1
EN_RXB
POL_INTPI_TDD_
0-0
EN_RXB
2.16.522 Register 9D9h (offset = 9D9h) [reset = 2h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
OVR_SEL_INTPI_
1-1
TDD_EN_RXB
OVR_INTPI_TDD_
0-0
EN_RXB
SBAU337 – May 2020
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Figure 2-2783. Register 9D5h
5 4
Table 2-2799. Register 9D5 Field Descriptions
Type Reset
R/W 1h
R/W 0h
Figure 2-2784. Register 9D8h
5 4
Table 2-2800. Register 9D8 Field Descriptions
Type Reset
R/W 0h
R/W 0h
Figure 2-2785. Register 9D9h
5 4
Table 2-2801. Register 9D9 Field Descriptions
Type Reset
R/W 1h
R/W 0h
Copyright © 2020, Texas Instruments Incorporated
3 2
OVR_SEL_INT
PI_TDD_EN_R
Description
control to select whether the input function intpi_tdd_en_rxa
needs to be overriden ot not. 1 indicates override.
override value for ovr_sel_intpi_tdd_en_rxa is made high
3 2
SEL_INTPI_TDD_EN_RXB
R/W-0h
Description
select control for intpi_tdd_en_rxb. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
polarity control for intpi_tdd_en_rxb. 0 indicates pass through
from GPIO when selected 1 indicates inverted signal
3 2
OVR_SEL_INT
PI_TDD_EN_R
Description
control to select whether the input function intpi_tdd_en_rxb
needs to be overriden ot not. 1 indicates override.
override value for ovr_sel_intpi_tdd_en_rxb is made high
Serial Interface Register Maps
IO Wrap Register Map
1 0
OVR_INTPI_T
DD_EN_RXA
XA
R/W-1h R/W-0h
1 0
POL_INTPI_TD
D_EN_RXB
R/W-0h
1 0
OVR_INTPI_T
DD_EN_RXB
XB
R/W-1h R/W-0h
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