Texas Instruments AFE79 Series Programming & User Manual page 1186

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IO Wrap Register Map
2.16.565 Register A48h (offset = A48h) [reset = 0h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
SEL_INTPI_TX_N
2-1
COSEL_3
POL_INTPI_TX_N
0-0
COSEL_3
2.16.566 Register A49h (offset = A49h) [reset = 2h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
OVR_SEL_INTPI_
1-1
TX_NCOSEL_3
OVR_INTPI_TX_N
0-0
COSEL_3
2.16.567 Register F00h (offset = F00h) [reset = 0h]
7
6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit
Field
USE_SERIAL_GPI
4-4
O
3-3
reserved
2-2
reserved
1-1
reserved
0-0
reserved
1186
Serial Interface Register Maps
Figure 2-2828. Register A48h
5
4
Table 2-2844. Register A48 Field Descriptions
Type
Reset
R/W
0h
R/W
0h
Figure 2-2829. Register A49h
5
4
Table 2-2845. Register A49 Field Descriptions
Type
Reset
R/W
1h
R/W
0h
Figure 2-2830. Register F00h
5
4
USE_SERIAL_
GPIO
R/W-0h
Table 2-2846. Register F00 Field Descriptions
Type
Reset
R/W
0h
R/W
0h
R/W
0h
R/W
0h
R/W
0h
Copyright © 2020, Texas Instruments Incorporated
3
2
SEL_INTPI_TX_NCOSEL_3
R/W-0h
Description
select control for intpi_tx_ncosel_3. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
polarity control for intpi_tx_ncosel_3. 0 indicates pass through
from GPIO when selected 1 indicates inverted signal
3
2
Description
control to select whether the input function intpi_tx_ncosel_3
needs to be overriden ot not. 1 indicates override.
override value for ovr_sel_intpi_tx_ncosel_3 is made high
3
2
reserved
reserved
R/W-0h
R/W-0h
Description
Enables Serial GPIO mode controlling GPIO
www.ti.com
1
0
POL_INTPI_TX
_NCOSEL_3
R/W-0h
1
0
OVR_SEL_INT
OVR_INTPI_TX
PI_TX_NCOSE
_NCOSEL_3
L_3
R/W-1h
R/W-0h
1
0
reserved
reserved
R/W-0h
R/W-0h
SBAU337 – May 2020
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