Texas Instruments AFE79 Series Programming & User Manual page 1166

IO Wrap Register Map
2.16.506 Register 915h (offset = 915h) [reset = 2h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
OVR_SEL_INTPI_
1-1
TX_FB_LOOP_3
OVR_INTPI_TX_F
0-0
B_LOOP_3
2.16.507 Register 954h (offset = 954h) [reset = 0h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
SEL_INTPI_RXA_
2-1 AGC_PIN_FREEZ
E
POL_INTPI_RXA_
0-0 AGC_PIN_FREEZ
E
2.16.508 Register 955h (offset = 955h) [reset = 2h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
OVR_SEL_INTPI_
1-1 RXA_AGC_PIN_F
REEZE
OVR_INTPI_RXA_
0-0 AGC_PIN_FREEZ
E
1166
Serial Interface Register Maps
Figure 2-2769. Register 915h
5 4
Table 2-2785. Register 915 Field Descriptions
Type Reset
R/W 1h
R/W 0h
Figure 2-2770. Register 954h
5 4
Table 2-2786. Register 954 Field Descriptions
Type Reset
R/W 0h
R/W 0h
Figure 2-2771. Register 955h
5 4
Table 2-2787. Register 955 Field Descriptions
Type Reset
R/W 1h
R/W 0h
Copyright © 2020, Texas Instruments Incorporated
3 2
OVR_SEL_INT
PI_TX_FB_LO
Description
control to select whether the input function intpi_tx_fb_loop_3
needs to be overriden ot not. 1 indicates override.
override value for ovr_sel_intpi_tx_fb_loop_3 is made high
3 2
SEL_INTPI_RXA_AGC_PIN_FR
EEZE
R/W-0h
Description
select control for intpi_rxa_agc_pin_freeze. 0 indicates take
from parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
polarity control for intpi_rxa_agc_pin_freeze. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal
3 2
OVR_SEL_INT
PI_RXA_AGC_
PIN_FREEZE
Description
control to select whether the input function
intpi_rxa_agc_pin_freeze needs to be overriden ot not. 1
indicates override.
override value for ovr_sel_intpi_rxa_agc_pin_freeze is made
high
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1 0
OVR_INTPI_TX
_FB_LOOP_3
OP_3
R/W-1h R/W-0h
1 0
POL_INTPI_RX
A_AGC_PIN_F
REEZE
R/W-0h
1 0
OVR_INTPI_R
XA_AGC_PIN_
FREEZE
R/W-1h R/W-0h
SBAU337 – May 2020