Texas Instruments AFE79 Series Programming & User Manual page 1177

www.ti.com
2.16.538 Register A11h (offset = A11h) [reset = 2h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
OVR_SEL_INTPI_
1-1
TX_GAIN_SW_1
OVR_INTPI_TX_G
0-0
AIN_SW_1
2.16.539 Register A14h (offset = A14h) [reset = 0h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
SEL_INTPI_TX_G
2-1
AIN_SW_2
POL_INTPI_TX_G
0-0
AIN_SW_2
2.16.540 Register A15h (offset = A15h) [reset = 2h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
OVR_SEL_INTPI_
1-1
TX_GAIN_SW_2
OVR_INTPI_TX_G
0-0
AIN_SW_2
SBAU337 – May 2020
Submit Documentation Feedback
Figure 2-2801. Register A11h
5 4
Table 2-2817. Register A11 Field Descriptions
Type Reset
R/W 1h
R/W 0h
Figure 2-2802. Register A14h
5 4
Table 2-2818. Register A14 Field Descriptions
Type Reset
R/W 0h
R/W 0h
Figure 2-2803. Register A15h
5 4
Table 2-2819. Register A15 Field Descriptions
Type Reset
R/W 1h
R/W 0h
Copyright © 2020, Texas Instruments Incorporated
3 2
OVR_SEL_INT
PI_TX_GAIN_S
Description
control to select whether the input function intpi_tx_gain_sw_1
needs to be overriden ot not. 1 indicates override.
override value for ovr_sel_intpi_tx_gain_sw_1 is made high
3 2
SEL_INTPI_TX_GAIN_SW_2
R/W-0h
Description
select control for intpi_tx_gain_sw_2. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
polarity control for intpi_tx_gain_sw_2. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal
3 2
OVR_SEL_INT
PI_TX_GAIN_S
Description
control to select whether the input function intpi_tx_gain_sw_2
needs to be overriden ot not. 1 indicates override.
override value for ovr_sel_intpi_tx_gain_sw_2 is made high
Serial Interface Register Maps
IO Wrap Register Map
1 0
OVR_INTPI_TX
_GAIN_SW_1
W_1
R/W-1h R/W-0h
1 0
POL_INTPI_TX
_GAIN_SW_2
R/W-0h
1 0
OVR_INTPI_TX
_GAIN_SW_2
W_2
R/W-1h R/W-0h
1177