Texas Instruments AFE79 Series Programming & User Manual page 1133

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2.16.407 Register 70Ch (offset = 70Ch) [reset = 0h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
POL_INTBIPO_SPI
0-0
B2_SDO
2.16.408 Register 70Dh (offset = 70Dh) [reset = 2h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
OVR_SEL_INTBIP
1-1
O_SPIB2_SDO
OVR_INTBIPO_SP
0-0
IB2_SDO
2.16.409 Register 800h (offset = 800h) [reset = 0h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
SEL_INTPI_SPIB2
2-1
_CS_N
POL_INTPI_SPIB2
0-0
_CS_N
SBAU337 – May 2020
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Figure 2-2670. Register 70Ch
5 4
Table 2-2686. Register 70C Field Descriptions
Type Reset
R/W 0h
Figure 2-2671. Register 70Dh
5 4
Table 2-2687. Register 70D Field Descriptions
Type Reset
R/W 1h
R/W 0h
Figure 2-2672. Register 800h
5 4
Table 2-2688. Register 800 Field Descriptions
Type Reset
R/W 0h
R/W 0h
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3 2
Description
polarity control for intbipo_spib2_sdo . 0 indicates pass
through from GPIO when selected, 1 indicates inverted signal
3 2
OVR_SEL_INT
BIPO_SPIB2_S
Description
control to select whether the input function intbipo_spib2_sdo
needs to be overriden ot not. 1 indicates override.
override value for intbipo_spib2_sdo when
ovr_sel_intbipo_spib2_sdo is made high
3 2
SEL_INTPI_SPIB2_CS_N
R/W-0h
Description
select control for intpi_spib2_cs_n. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
polarity control for intpi_spib2_cs_n. 0 indicates pass through
from GPIO when selected 1 indicates inverted signal
Serial Interface Register Maps
IO Wrap Register Map
1 0
POL_INTBIPO_
SPIB2_SDO
R/W-0h
1 0
OVR_INTBIPO
_SPIB2_SDO
DO
R/W-1h R/W-0h
1 0
POL_INTPI_SP
IB2_CS_N
R/W-0h
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