Texas Instruments AFE79 Series Programming & User Manual page 1159

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2.16.485 Register 8B8h (offset = 8B8h) [reset = 0h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
SEL_INTPI_TDD_
2-1
EN_TXA
POL_INTPI_TDD_
0-0
EN_TXA
2.16.486 Register 8B9h (offset = 8B9h) [reset = 2h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
OVR_SEL_INTPI_
1-1
TDD_EN_TXA
OVR_INTPI_TDD_
0-0
EN_TXA
2.16.487 Register 8BCh (offset = 8BCh) [reset = 0h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
SEL_INTPI_TDD_
2-1
EN_TXB
POL_INTPI_TDD_
0-0
EN_TXB
SBAU337 – May 2020
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Figure 2-2748. Register 8B8h
5 4
Table 2-2764. Register 8B8 Field Descriptions
Type Reset
R/W 0h
R/W 0h
Figure 2-2749. Register 8B9h
5 4
Table 2-2765. Register 8B9 Field Descriptions
Type Reset
R/W 1h
R/W 0h
Figure 2-2750. Register 8BCh
5 4
Table 2-2766. Register 8BC Field Descriptions
Type Reset
R/W 0h
R/W 0h
Copyright © 2020, Texas Instruments Incorporated
3 2
SEL_INTPI_TDD_EN_TXA
R/W-0h
Description
select control for intpi_tdd_en_txa. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
polarity control for intpi_tdd_en_txa. 0 indicates pass through
from GPIO when selected 1 indicates inverted signal
3 2
OVR_SEL_INT
PI_TDD_EN_T
Description
control to select whether the input function intpi_tdd_en_txa
needs to be overriden ot not. 1 indicates override.
override value for ovr_sel_intpi_tdd_en_txa is made high
3 2
SEL_INTPI_TDD_EN_TXB
R/W-0h
Description
select control for intpi_tdd_en_txb. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
polarity control for intpi_tdd_en_txb. 0 indicates pass through
from GPIO when selected 1 indicates inverted signal
Serial Interface Register Maps
IO Wrap Register Map
1 0
POL_INTPI_TD
D_EN_TXA
R/W-0h
1 0
OVR_INTPI_T
DD_EN_TXA
XA
R/W-1h R/W-0h
1 0
POL_INTPI_TD
D_EN_TXB
R/W-0h
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