Texas Instruments AFE79 Series Programming & User Manual page 1175

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2.16.532 Register 9EDh (offset = 9EDh) [reset = 2h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
OVR_SEL_INTPI_
1-1
RX_GAIN_SW_2
OVR_INTPI_RX_G
0-0
AIN_SW_2
2.16.533 Register 9F0h (offset = 9F0h) [reset = 0h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
SEL_INTPI_RX_G
2-1
AIN_SW_3
POL_INTPI_RX_G
0-0
AIN_SW_3
2.16.534 Register 9F1h (offset = 9F1h) [reset = 2h]
7 6
LEGEND: R/W = Read/Write; W = Write only; -n = value after reset
Bit Field
OVR_SEL_INTPI_
1-1
RX_GAIN_SW_3
OVR_INTPI_RX_G
0-0
AIN_SW_3
SBAU337 – May 2020
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Figure 2-2795. Register 9EDh
5 4
Table 2-2811. Register 9ED Field Descriptions
Type Reset
R/W 1h
R/W 0h
Figure 2-2796. Register 9F0h
5 4
Table 2-2812. Register 9F0 Field Descriptions
Type Reset
R/W 0h
R/W 0h
Figure 2-2797. Register 9F1h
5 4
Table 2-2813. Register 9F1 Field Descriptions
Type Reset
R/W 1h
R/W 0h
Copyright © 2020, Texas Instruments Incorporated
3 2
OVR_SEL_INT
PI_RX_GAIN_S
Description
control to select whether the input function intpi_rx_gain_sw_2
needs to be overriden ot not. 1 indicates override.
override value for ovr_sel_intpi_rx_gain_sw_2 is made high
3 2
SEL_INTPI_RX_GAIN_SW_3
R/W-0h
Description
select control for intpi_rx_gain_sw_3. 0 indicates take from
parallel GPIO 1 indicates take from Serial LVDS GPIO 2
indicates take from Serdes GPIO
polarity control for intpi_rx_gain_sw_3. 0 indicates pass
through from GPIO when selected 1 indicates inverted signal
3 2
OVR_SEL_INT
PI_RX_GAIN_S
Description
control to select whether the input function intpi_rx_gain_sw_3
needs to be overriden ot not. 1 indicates override.
override value for ovr_sel_intpi_rx_gain_sw_3 is made high
Serial Interface Register Maps
IO Wrap Register Map
1 0
OVR_INTPI_R
X_GAIN_SW_2
W_2
R/W-1h R/W-0h
1 0
POL_INTPI_RX
_GAIN_SW_3
R/W-0h
1 0
OVR_INTPI_R
X_GAIN_SW_3
W_3
R/W-1h R/W-0h
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