Agilent Technologies Agilent 33500 Series Operating And Service Manual page 409

Block Diagram
Output Range
DC Offset < 320 mV
4 Vpp - 1.44 Vpp
1.6 Vpp - 576 mVpp
640 mVpp - 230 mVpp
256 mVpp - 92 mVpp
102.4 mVpp - 36.86 mVpp
40.96 mVpp - 1.00 mVpp
The output relay when enabled provides the waveform to the front panel BNC connector. Additionally, this relay, when
disabled, routes the signal to the Modulation ADC for internal self-test and calibration routines.
The output relay is controlled by the FPGA. Two circuits provide overvoltage and over current protection, primarily from
an external circuit. The instrument can source very low output impedances.
The Sync output signal is generated as a waveform from the FPGA to the Sync DAC.
External trigger in and out is chassis referenced at the BNC connector but is isolated before the FPGA.
Modulation in is an isolated input to the A/D converter. The FPGA applies the modulation signal to the output wave-
form.
The instrument's clock generator employs a 10-MHz crystal oscillator and a phase-locked loop to generate the 250-MHz
clocks used by the FPGA and Waveform DACs. When an external 10-MHz frequency reference is used, a digital phase-
locked loop in the FPGA keeps the crystal oscillator in sync.
408
-7.96 dB -15.91 dB
In Out
Out In
Out Out
In Out
Out In
In In
-23.87 dB -23.87 dB
(post)
Out Out
Out Out
In Out
In Out
In Out
In Out
Agilent 33500 Series Operating and Service Guide