Servo Control System; Board, And Se-613 Board) - Sony HDW-750 Maintenance Manual

1-26-6. Servo Control System

(SS-92 Board, MDC-13 Board, MDR-

14 Board, and SE-613 Board)

Servo control is accomplished by the SS CPU (IC1) on the
SS-92 board.
The MDC-13 board, MDR-14 board and SE-613 board
have the motor drive circuit and sensor system circuits.
The SS-92 board and the MDC-13 board are connected by
two flexible card wires (each 45 pins).
The signals of the MDR-14 board are connected with the
SS-92 board via the MDC-13 board.
The MDR-14 board is connected with the drum motor and
functions as a relay circuit board to transmit the signals com-
ing from the drum motor and SS-92 board to the EQ-88 board.
The SE-613 board is also connected to the SS-92 board via
the MDC-13 board.
SS-92 board
The respective servo circuits are controlled by the SS CPU
(IC1) that performs the system control and the servo
control of the VTR.
The SS CPU (IC1) contains the FG detection, PPG, PWM,
PIO, ADC modules that are required for the VTR servo
control. Using these functions, the servo control and the
creation of the output control signals are performed.
The drive voltages that drive the drum motor and the capstan
motor are controlled by the PWM control circuit. The PWM
output signals are converted to analog voltages and are sent
to the MDC-13 board and to the MDR-14 board.
The FG and PG signals that are waveform-shaped in the
MDC-13 board and the MDR-14 board are sent to the SS
CPU (IC1) of the SS-92 board where the respective motors
are controlled.
The capstan FG wave amplifier in the SS-92 board is used
for the STOP servo circuit.
The CTL signal that is waveform-shaped for the capstan phase
servo in the MDC-13 board is input to the SS CPU (IC1).
The loading motor is controlled by the three control signal
lines (two lines of SS_LOADING_CONT and a
SS_L_LOADING_SLOW) that detect the 4-bit position
information data (MDC_FCAM) from the MDC-13 board.
In addition to the above signals, information from the
various sensors is input to the SS CPU (IC1) and is used
for various controls.
On the other hand, the various IC control signals are
created specifically for the respective applications and
supplied to the EQ-88 board and DVP-18 board.
The SS CPU (IC1) and the servo adjustment data storage
EEPROM (IC403 : MDC-13 board) are connected by
serial communication.
HDW-750/750CE V1
MDC-13 board
The MDC-13 board consists of the capstan FG waveform
shaping circuit, capstan drive PWM driver amplifier,
mechanism drive motor driver, CTL record/playback
amplifier, LTC record/playback amplifier, CUE record/
playback amplifier, full erase circuit, mechanism position
sensor, cassette lock sensor, HUMID sensor circuit, and
cassette ID switch.
The capstan FG waveform shaping circuit amplifies the
output signal from the MR sensor of the capstan motor
with the operational amplifier (IC201), adds an offset
voltage at the comparator (IC202 and IC203), and then
shapes its waveform to a rectangular wave.
The waveform shaping processing is performed by the
comparator IC204 (1/4 and 2/4) to generate the 4 times FG
signal that is used inside the SS CPU (IC1) of the SS-92
board.
The capstan drive PWM driver amplifier consists of the
PWM amplifier (PWM module IC (IC101) and switching
FET (Q102)) and 3-phase motor driver (IC102).
The capstan drive PWM signal that is output from the SS
CPU (IC1) of the SS-92 board is amplified by the driver
and drives the capstan motor.
The CTL record/playback amplifier consists of the CTL
amplifier (Q615 and Q616) for recording and the CTL
playback amplifier (IC616 and IC617). During recording,
the CTL signal that is generated by the SS CPU (IC1) of
the SS-92 board is amplified to control the recording
current flowing through the CTL head so that the CTL
signal is recorded on tape. During playback, the CTL
signal that is picked up from the playback amplifier is
converted to a rectangular wave that is used for the capstan
playback servo system that is controlled by the SS CPU
(IC1) of the SS-92 board.
The mechanism position sensors are used to monitor the
status of the VTR mechanism. The SS CPU (IC1) of the
SS-92 board judges the status of the mechanism position.
The cam gear motor is controlled by the mechanism drive
motor driver that consists of IC402. Thus the mechanism is
controlled as described above.
The cassette lock sensor consists of the optical sensor of
PH307 that sends the status of the cassette compartment as
the mechanism information to the SS CPU (IC1) of the SS-
92 board. The cassette ID switch consists of six push-switch-
es (S301 to S305, and S308). Output information of the cas-
sette ID switch is sent to the SS CPU (IC1) of the SS-92
board as the cassette tape ID and other cassette information.
The HUMID sensor circuit consists of the HUMID sensor
and the comparator (IC303). This HUMID information is
sent to the SS CPU (IC1) of the SS-92 board.
1-26. Circuit Description
1-26-6. Servo Control System
1-75