System Control (Fp-121 Board And Ss-92 Board) - Sony HDW-750 Maintenance Manual

1-26. Circuit Description
1-26-5. System Control
1-26-5. System Control (FP-121 Board and
SS-92 Board)
FP-121 board
The FP-121 board has the FP CPU (IC801 : with built-in
flash RAM) as the sub system control for VTR.
The FP CPU (IC801) performs the following processes.
. Communication with the VTR main CPU (IC1 : SS
CPU) on the SS-92 board
The FP-121 board and the SS-92 board are connected via
the MB-898 board. The FP CPU (IC801) and the SS CPU
(IC1) on the SS-92 board are connected by the clock signal
synchronous-type serial communication once in every field at
the frequency of about 500 kHz. The clock signal is a fixed
length of 57 bytes. The SS CPU (IC1) is used as the master
clock generator.
. Audio mode control
Audio control is performed by receiving the audio mode
information and the menu setup information from the SS
CPU (IC1) on the SS-92 board. The port of the FP CPU
(IC801) is used as the input port and the switch informa-
tion that is required for the audio mode control is input to
this port. The control output is output from the latch IC
(IC820 to IC826) of the FP CPU (IC801).
. Audio control IC
The following processes are performed by establishing
serial communication with the audio control IC (IC103) of
the APR-59 board.
. Switching of the digital bus
. Audio level detection
. ON/OFF control of the internal signal generator
. Audio delay control
The block has a circuit configuration that can isolate the
bus to enable the FP CPU (IC801) to operate even when
the main power is turned off.
. AUDIO level indication
The audio level information is supplied from the audio
control IC (IC103) of the APR-59 board, and is sent to the
SS CPU (IC1) of the SS-92 board. It has the data size of 16
bits x 4CH. The SS CPU (IC1) performs soft processing
such as peak detection of the 16-bit data and creates the
audio level indication data that is sent to the FP CPU
(IC801). The FP CPU (IC801) displays the audio level on
the LCD at every serial communication event.
1-72
. CTL/TC/UBIT display
The ON/OFF information of the switches that are connect-
ed to the port is scanned and sent to the SS CPU (IC1) of
the SS-92 board. The SS CPU (IC1) changes the display
data in accordance with the setting conditions, and the
display data is sent to the FP CPU (IC801). The FP CPU
(IC801) displays the received data at every serial commu-
nication event.
The FP CPU (IC801) only sends the switch information to
the SS CPU (IC1), and does not create the display data.
. Watch IC control
The watch data is read from the watch IC (IC809 : EE-
PROM) of the FP-121 board, and is sent to the SS CPU
(IC1) of the SS-92 board. The SS CPU (IC1) sends also the
time data to the camera CPU (IC27) of the AT-143 board.
The viewfinder uses the time data for displaying the time.
When the time of the watch is set with the use of the menu,
a set of data, a year, month, day, time and minute, is sent to
the FP CPU (IC801) in the reverse route. At the same time,
the time setting request is issued from the SS CPU (IC1).
The FP CPU (IC801) sets the time to the watch IC (IC809)
and confirms the data.
. WARNING LED control and alarm tone control
The WARNING information is supplied from the SS CPU
(IC1) of the SS-92 board that is used to turn on and off the
WARNING LED (D815) on the FP-121 board. The 1 kHz
square wave output from the PWM generator circuit inside
the FP CPU (IC801), is used as the alarm tone and is
output from the FP CPU (IC801 : pin-27).
. Connection circuit with the wireless receiver (optional
equipment)
The RS-232C TRANSCEIVER (IC817) on the FP-121
board acts as the interface circuit for connection with the
wireless receiver. The FP CPU (IC801) performs the serial
communication when the optional wireless receiver is
installed, and reads the reception RF sensitivity and muting
information. This data is sent to the camera CPU (IC27)
via the SS CPU (IC1) on the SS-92 board so that it can be
viewed on the viewfinder.
. Software download function
The FP CPU (IC801) is a CPU with built-in flash memory
that enables rewriting of software.
To rewrite the software, the software that is saved in a
Memory Stick is read by the camera microprocessor and is
transferred to the FP CPU (IC801) via the SS CPU (IC1)
for rewriting. The FP CPU (IC801 : pin-4) goes "H" during
rewriting to release the WRITE INHIBIT.
The FP-121 board contains the power supply control
circuit and the automatic insertion detection circuit for the
REAR XLR connector.
HDW-750/750CE V1