Pci Bus - Sun Microsystems Sun Ultra 60 Service Manual

Figure C–2 UPA Address and Data Buses Functional Block Diagram
C.1.2

PCI Bus

The peripheral component interconnect (PCI) bus is a high-performance 32-bit or
64-bit bus with multiplexed address and data lines. The PCI bus provides electrical
interconnect between highly integrated peripheral controller components, peripheral
add-on devices, and the processor/memory system.
There are two PCI buses (Figure C–1). The first bus is a one-slot, 3.3-Vdc, 64-bit or
32-bit, 66-MHz or 33-MHz bus. The second bus is a three-slot, 5.0-Vdc, 64-bit or
32-bit, 33-MHz bus. Each bus is controlled by the UPA-to-PCI bridge (U2P) ASIC.
There are also two on-board controllers, the Symbios 53C876 SCSI controller and the
PCI-to-Ebus/Ethernet controller (PCIO) ASIC, on the 33-MHz PCI bus.
C-5
Functional Description