2.10 Arm946E-S Register; Table 5: Cp15 Registers - Overview - Siemens Ertec 400 Manual

2.10 ARM946E-S Register

The ARM946E-S uses CP15 registers for system control.
Consequently, the following settings are possible:
Configure cache type and cache memory area
•
Configure tightly coupled memory area
•
Configure memory protection unit for various regions and memory types
•
Assign system option parameters
•
Configure "Little Endian" or "Big Endian" operations
•
The following table shows all CP15 registers with their access options.
Register Access
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

Table 5: CP15 Registers - Overview

(1) Registers contain multiple information entries that are selected by the "opcode_2" or "CRm" fields.
(2) Separate registers for instruction and data (see detailed description of registers).
Undefined means:
When this register is read, the read value is undefined.
When this register is written to, unforeseeable configuration changes can occur in the ARM946.
Refer to documents /1/ and /2/ for a detailed description of the ARM946 registers.
Copyright © Siemens AG 2010. All rights reserved.
Technical data subject to change
Description
ID code register (1)
Cache type register (1)
R
Tightly coupled memory size register (2)
W/R Control register
W/R Cache configuration register (2)
W/R Write buffer control register
xxx
W/R Access permission register (2)
Protection region base/size register (2)
W/R
W Cache operation register
xxx
Cache lockdown register (2)
W/R
xxx
xxx
xxx
W/R Trace process ID register
xxx
RAM/TAG-BIST test register (1)
Test state register (1)
W/R
Cache debug index register (1)
Trace control register
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
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ERTEC 400 Manual
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