Siemens Ertec 400 Manual page 68

Too many retrys in a row for the same access
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Access to the master is terminated with an error response and the timeout interrupt is activated.
Because there is no requirement that an access that is rejected with Retry has to be repeated, the next
access of the master can be switched to the slave.
HSPLIT is missing after a split response
•
Access to the master is terminated with an error response and the timeout interrupt is activated. The
slave must continue to wait for signal HSPLIT=1. As long as the signal to the slave is missing, all other
accesses to the slave must be blocked with an error response.
According to the AHB specification, once the slave outputs HSPLIT=1, access must be repeated. However,
because access is already terminated for the master, the data phase can no longer be handled correctly.
Caution:
Under very rare conditions, in PCI-boot mode, it is possible that the interrupt bit 4 "INT_QVZ_PCI_STATE " in
register "PLL_STAT_REG" will be left "on" after finishing the 1st level boot.
Workaround:
To avoid irritations concerning the interrupt causes it is recommended to reset interrupt bit 4
"INT_QVZ_PCI_STATE" in register "PLL_STAT_REG" at the beginning of 2nd level boot code.
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Technical data subject to change
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68
ERTEC 400 Manual
Version 1.2.2