Memory Description; Memory Partitioning Of The Ertec 400; Table 28: Partitioning Of Memory Areas - Siemens Ertec 400 Manual

9

Memory Description

This section presents a detailed description of the memory areas of all integrated function groups.
9.1

Memory Partitioning of the ERTEC 400

The table below lists the AHB masters along with their options for accessing various memory areas.
Start and End
Segment
Address
0000 0000
0
0FFF FFFF
1000 0000
1
1FFF FFFF
2000 0000
2
2FFF FFFF
3000 0000
3
3FFF FFFF
4000 0000
4
4FFF FFFF
5000 0000
5
5FFF FFFF
6000 0000
6
6FFF FFFF
7000 0000
7
7FFF FFFF
8000 0000
8 - 15
FFFF FFFF

Table 28: Partitioning of Memory Areas

Copyright © Siemens AG 2010. All rights reserved.
Technical data subject to change
Function Area for
ARM9
Internal Boot ROM or
internal RAM
IRT switch
EMIF (SDRAM)
EMIF (asynchr.
Memory Area Bank 0-
3)
All APB macros incl.
boot ROM
ARM-ICU
Internal SRAM
EMIF register
PCI
Function Area for IRT
Internal Boot ROM or
internal RAM
Not used
EMIF (SDRAM)
EMIF (asynchr.
Memory Area Bank 0-
3)
Not used
Not used
Internal SRAM
Not used
PCI
Page
92
Function Area for
PCI/LBU
Internal Boot ROM or
internal RAM
IRT switch
EMIF (SDRAM)
EMIF (asynchr. Memory
Area Bank 0-3)
All APB macros incl.
boot ROM
Not used
Internal SRAM
EMIF register
Not used
ERTEC 400 Manual
Version 1.2.2