Address Assignment Of Lbu Registers; Table 26: Overview Of Lbu Registers - Siemens Ertec 400 Manual

7.4

Address Assignment of LBU Registers

The LBU registers are 16 bits in width. The registers can be written to with 16-bit accesses only. The LBU
paging configuration registers are addressed via the "LBU_CS_R_N" input.
Register Name Offset Address Address Area
LBU_P0_RG_L
LBU_P0_RG_H
LBU_P0_OF_L
LBU_P0_OF_H
LBU_P0_CFG
LBU_P1_RG_L
LBU_P1_RG_H
LBU_P1_OF_L
LBU_P1_OF_H
LBU_P1_CFG
LBU_P2_RG_L
LBU_P2_RG_H
LBU_P2_OF_L
LBU_P2_OF_H
LBU_P2_CFG
LBU_P3_RG_L
LBU_P3_RG_H
LBU_P3_OF_L
LBU_P3_OF_H
LBU_P3_CFG

Table 26: Overview of LBU Registers

Copyright © Siemens AG 2010. All rights reserved.
Technical data subject to change
0x0000 2 bytes
0x0002 2 bytes
0x0004 2 bytes
0x0006 2 bytes
0x0008 2 bytes
0x0010 2 bytes
0x0012 2 bytes
0x0014 2 bytes
0x0016 2 bytes
0x0018 2 bytes
0x0020 2 bytes
0x0022 2 bytes
0x0024 2 bytes
0x0026 2 bytes
0x0028 2 bytes
0x0030 2 bytes
0x0032 2 bytes
0x0034 2 bytes
0x0036 2 bytes
0x0038 2 bytes
LBU
Access Default
W/R 0x0000
W/R 0x0000
W/R 0x0000
W/R 0x0000
W/R 0x0000
W/R 0x0000
W/R 0x0000
W/R 0x0000
W/R 0x0000
W/R 0x0000
W/R 0x0000
W/R 0x0000
W/R 0x0000
W/R 0x0000
W/R 0x0000
W/R 0x0000
W/R 0x0000
W/R 0x0000
W/R 0x0000
W/R 0x0000
Page
81
Description
LBU pagex range register 0 Low
LBU pagex range register 0 High
LBU pagex offset register 0 Low
LBU pagex offset register 0 High
LBU configuration register 0
LBU pagex range register 1 Low
LBU pagex range register 1 High
LBU pagex offset register 1 Low
LBU pagex offset register 1 High
LBU configuration register 1
LBU pagex range register 2 Low
LBU pagex range register 2 High
LBU pagex offset register 2 Low
LBU pagex offset register 2 High
LBU configuration register 2
LBU pagex range register 3 Low
LBU pagex range register 3 High
LBU pagex offset register 3 Low
LBU pagex offset register 3 High
LBU configuration register 3
ERTEC 400 Manual
Version 1.2.2