Siemens Ertec 400 Manual page 51

UARTIIR/UARTICR
UARTIIR/UARTICR
Description UART interrupt identification register (read)
UART interrupt clear register (write)
Bit No. Name
0 MIS (Read)
1 RIS (Read)
2 TIS (Read)
3 RTIS (Read)
7 - 4 ----- (Read)
7 - 0 ----- (Write)
UARTILPR
(1)
UARTILPR
(2)
Description UART IrDA low power counter registers
(not supported in ERTEC400)
Bit No. Name
7 - 0 ILPDVSR
NOTE: The low power divisor is calculated according to the following formula:
F
UARTCLK
ILPDVSR
= ---------------------- - 1
F
IrLPBAUD16
Zero is not a valid divisor.
Copyright © Siemens AG 2010. All rights reserved.
Technical data subject to change
R/W
(1)
R/W
(2)
Description
Modem Interrupt Status This bit is set if UARTMSINTR is active.
Receive Interrupt Status This bit is set if UARTRXINTR is active.
Transmit Interrupt Status This bit is set if UARTTXINTR is active.
Receive Timeout Interrupt Status This bit is set if UARTRTINTR is active.
Reserved
Value is undefined
Writing to this register deletes the MIS bit irrespective of the value written.
R/W
R/W
Description
8-bit low power divisor value
FIrLPBAUD16 is nominally 1.8432 MHz
Addr.: 0x4000_231C
Addr.: 0x4000_241C
Addr.: 0x4000_2320
Addr.: 0x4000_2420
Page
51
Default: 0x00
Default: 0x00
Default: 0x00
Default: 0x00
ERTEC 400 Manual
Version 1.2.2