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Compatibility Bus Address Space Modifier Entry - Intel MultiProcessor Specification

Intel multiprocessor specification
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For example, a host bus bridge for a PCI bus that provides ISA compatibility may decode a
predefined range of addresses used for ISA device support in addition to the addresses used for PCI
devices on that bus. A Compatibility Bus Address Space Modifier can be used in this case to add
these predefined address ranges to the list specified by System Address Space Mapping entries for
that PCI bus. As a corollary, in a system where two peer PCI buses are included, one of which
provides ISA compatibility, a Compatibility Bus Address Space Modifier can be used to subtract
these predefined ranges from the address space assigned to the PCI bus that does not support ISA
devices to avoid any potential conflict.
The same effect can be achieved by using System Address Space Mapping entries to completely
describe the address ranges supported on a bus, including those ranges that might otherwise be
described by a Compatibility Bus Address Space Modifier entry. However, given the number of
discrete address ranges that are used for ISA device compatibility, using an approach based solely
on System Address Space Mapping entries may result in a significantly larger number of
configuration table entries and a corresponding increase in table size.
Figure 4-12 shows the format of each entry, and Table 4-16 explains each field.
31
28
ADDRESS MO D
R ESER VED
31
28
Figure 4-12. Compatibility Bus Address Space Modifier Entry
Version 1.4
27
24
23
20
19
16
15
PREDEFINED RANG E LIST
B U S ID
EN TR Y LEN G TH
P
R
27
24
23
20
19
16
15
MP Configuration Table
12
11
8
7
4
3
0
04H
EN TR Y TYPE
00H
130
12
11
8
7
4
3
0
4-23

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